Epitaxial Layer Growth with Two-Step Defect Reduction Bake

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Solution Overview

Problem

Existing epitaxial layer growth processes struggle to produce high-quality, uniform layers with low defect counts, particularly for advanced semiconductor devices, as they are not well-suited for the stringent requirements of smaller feature sizes and increased complexity in ICs.

Innovation Solution

A two-step defect reduction bake process followed by a high-temperature epitaxial layer growth, involving a high-pressure and a lower-pressure bake, effectively reduces defects and contaminants, allowing for the formation of high-quality epitaxial layers with low defect counts and improved uniformity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If existing low-temperature epitaxial layer growth processes are used, then the manufacturing process is simpler and lower cost, but the defect count is high and layer uniformity is poor

Engineering Contradiction:
Improvelayer uniformityVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The baking process is divided into two distinct steps: a first baking step at a first temperature and a second baking step at a second temperature. This segmentation allows each step to address specific defects independently, achieving superior layer uniformity and low defect counts while maintaining process control

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The two-step baking process is performed as a preliminary treatment before epitaxial layer growth. This preliminary action removes defects and contaminants from the substrate surface in advance, ensuring that the subsequent epitaxial growth produces high-quality layers with excellent uniformity

Inventive Principle:
Principle #10Preliminary action

2Reliability

If existing epitaxial layer growth processes are used, then the process is faster and simpler, but the defect count is high which reduces production yield

Engineering Contradiction:
Improveproduction yieldVSAvoidprocess time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The two-step baking process is performed as a preliminary treatment before epitaxial layer growth. This preliminary action removes defects and contaminants from the substrate surface in advance, ensuring that the subsequent epitaxial growth produces high-quality layers with excellent uniformity

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The process uses different temperature parameters for the two baking steps, with the second temperature being higher than the first. This parameter change enables effective defect removal while controlling the overall process time and maintaining productivity

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method significantly reduces defects by 1000x compared to existing low-temperature processes, achieving excellent within-wafer and wafer-to-wafer thickness uniformity, enhancing production yield and device performance.

Implementation Method 1

a first pre-epitaxial layer deposition baking process is performed at a first pressure and first temperature. In some cases, after the first pre-epitaxial layer deposition baking process, a second pre-epitaxial layer deposition baking process is then performed at a second pressure and second temperature

Methodology Applied
Scientific EffectThermal treatment: Heating

Implementation Method 2

after the second pre-epitaxial layer deposition baking process and while at a growth temperature, a precursor gas may then be introduced into the processing chamber to deposit an epitaxial layer over the semiconductor wafer

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Implementation Method 3

a precursor gas may then be introduced into the processing chamber to deposit an epitaxial layer

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Data Source

PatentUS12369374B2Epitaxial growth methods and structures thereof
Publication Date: 2025.07.22 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12369374B2 patent drawing
  • US12369374B2 patent drawing
  • US12369374B2 patent drawing

AI summary

A method and structure for providing a two-step defect reduction bake, followed by a high-temperature epitaxial layer growth. In various embodiments, a semiconductor wafer is loaded into a processing chamber. While the semiconductor wafer is loaded within the processing chamber, a first pre-epitaxial layer deposition baking process is performed at a first pressure and first temperature. In some cases, after the first pre-epitaxial layer deposition baking process, a second pre-epitaxial layer deposition baking process is then performed at a second pressure and second temperature. In some embodiments, the second pressure is different than the first pressure. By way of example, after the second pre-epitaxial layer deposition baking process and while at a growth temperature, a precursor gas may then be introduced into the processing chamber to deposit an epitaxial layer over the semiconductor wafer.