Epitaxial Growth on Patterned Substrates for Dislocation Control
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Solution Overview
Problem
The integration of lattice mismatched and thermally mismatched semiconductor layers during epitaxial growth often results in threading dislocations, layer cracking, and wafer bowing, which hinder the performance and reliability of devices such as solar cells, light emitting diodes, and semiconductor lasers.
Innovation Solution
The use of patterned substrates with elevated regions separated by narrow channels allows for elastic stress relaxation and dislocation annihilation, preventing threading dislocations and minimizing wafer bowing by ensuring that material growth does not merge across substrate regions, thereby controlling dislocation lines to the edges of elevated regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If continuous epitaxial layers are grown on mismatched substrates, then device functionality is achieved, but threading dislocations and layer cracking occur
Solution Approach 1:
The substrate surface is segmented into discrete elevated regions (islands) separated by grooves, allowing epitaxial growth to occur only on these isolated regions. This segmentation prevents the formation of continuous layers that would otherwise generate threading dislocations and cracking, while still enabling device functionality on each isolated region.
Solution Approach 2:
The substrate is given non-uniform local quality through the creation of elevated regions with different heights and positions. By controlling the local morphology (elevated regions vs. grooves), the patent enables selective epitaxial growth that eliminates harmful dislocations while maintaining necessary device functions in specific locations.
2Reliability
If thick epitaxial layers are grown to enable device operation, then device performance improves, but wafer bowing and cracking increase
Solution Approach 1:
The patent segments the epitaxial structure into isolated regions on elevated substrate features. This segmentation allows thick layers to be grown on each region without the cumulative stress that would cause wafer bowing and cracking in continuous layers, as each isolated region can independently accommodate thermal and lattice mismatch stresses.
3Stress or pressure
If misfit dislocations are formed to relieve stress, then elastic stress is reduced, but threading dislocations extend into the active region
Solution Approach 1:
The patent extracts or removes the harmful threading dislocations from the active region by confining epitaxial growth to isolated elevated regions. The dislocations are either contained within the elevated regions or prevented from forming in the first place, effectively taking them out of the active device areas where they would cause performance degradation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces threading dislocation densities and prevents layer cracking and wafer bowing, enabling the fabrication of high-quality, thick epitaxial layers for advanced semiconductor devices.
Implementation Method 1
The use of patterned substrates with elevated regions separated by narrow channels allows for elastic stress relaxation
Implementation Method 2
the epitaxial growth of lattice mismatched and thermally mismatched layers
Implementation Method 3
mismatch of the thermal expansion coefficients is equally serious, especially when layers with relatively large thicknesses are needed
Data Source
Figure 1(a)~1(b)
Figure 2
Figure 3(a)~3(c)
AI summary
Structures and methods for producing active layer stacks of lattice matched, lattice mismatched and thermally mismatched semiconductor materials, with low threading dislocation densities, no layer cracking and minimized wafer bowing, by using epitaxial growth onto elevated substrate regions in a mask-less process.