Epitaxial Lateral Overgrowth for Defect Reduction in Compound Semiconductors
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Solution Overview
Problem
Combining lattice-mismatched semiconductor materials, such as III-V compound semiconductors with silicon substrates poses challenges due to significant lattice and thermal expansion coefficient mismatches, leading to structural defects and high defect densities in monolithic integration.
Innovation Solution
A method involving a crystalline silicon substrate with a dielectric layer and a confinement structure is used to grow a crystalline compound semiconductor material, where the dielectric layer has openings with sidewalls and a bottom acting as a growth seed, allowing for epitaxial lateral overgrowth within a confinement region, thereby reducing defect density and achieving high-quality crystalline layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If direct epitaxy of blanket layers is used to achieve gradual lattice transition, then lattice mismatch is reduced, but relatively thick transition layers are needed which increases manufacturing complexity and cost
Solution Approach 1:
The patent divides the growth process into two distinct stages: confined growth within trenches where defects are terminated at sidewalls, followed by lateral overgrowth. This segmentation allows defect termination without requiring thick transition layers, resolving the contradiction between crystalline quality and manufacturing complexity
Solution Approach 2:
The dielectric material in the trenches acts as an intermediary that terminates crystal defects at the sidewalls. This mediator prevents defect propagation into the active compound semiconductor layers, achieving high crystalline quality without thick transition layers
2Adaptability or versatility
If bonding techniques such as direct wafer bonding are used to combine compound semiconductors with silicon, then monolithic integration is achieved, but the process becomes expensive and limited to small wafer sizes
Solution Approach 1:
The patent applies aspect ratio trapping locally within trenches on the silicon substrate, allowing compound semiconductor growth only in specific confined regions. This local approach enables monolithic integration without requiring expensive full-wafer bonding processes
Solution Approach 2:
The patent transitions from planar growth to three-dimensional confined growth within trenches, then to lateral overgrowth. This dimensional change enables defect termination and high-quality material growth directly on silicon without bonding
3Reliability
If aspect ratio trapping with large trench aspect ratios is used to terminate defects, then crystalline defect density is reduced, but the manufacturing process becomes more complex
Solution Approach 1:
The patent optimizes the trench aspect ratio to a moderate range (1:1 to 3:1) rather than requiring extremely high aspect ratios. This parameter change achieves effective defect termination while simplifying the manufacturing process and reducing etching complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the growth of high-quality, low-defect III-V compound semiconductor layers on silicon substrates, facilitating efficient integration with silicon-based devices and overcoming lattice mismatch issues, resulting in improved crystalline quality and reduced material usage.
Implementation Method 1
growing a crystalline compound semiconductor material in the confinement region, thereby at least partially filling the confinement region
Data Source
AI summary
Method for fabricating a semiconductor structure. The method includes: providing a crystalline silicon substrate; defining an opening in a dielectric layer on the crystalline silicon substrate, the opening having sidewalls and a bottom wherein the bottom corresponds to a surface of the crystalline silicon substrate; providing a confinement structure above the dielectric layer, thereby forming a confinement region between the confinement structure and the dielectric layer; and growing a crystalline compound semiconductor material in the confinement region thereby at least partially filling the confinement region. The present invention also provides an improved compound semiconductor structure and a device for fabricating such semiconductor structure.