Epitaxial Layer Profile Differentiation via Selective Replacement

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Solution Overview

Problem

In advanced semiconductor processes, particularly at the 65-nm node and beyond, increasing the driving current in MOS transistors remains a challenge, as existing methods for forming different epitaxial layers require multiple lithography processes, leading to over-etching and residue issues, and struggle to maintain consistent distances between epitaxial layers and gates.

Innovation Solution

An epitaxial process that forms first epitaxial layers beside both gates simultaneously, then replaces these layers with second epitaxial layers of different profiles, using a single lithography process to avoid overlap and residue issues, and maintain consistent distances, allowing for the formation of both NMOS and PMOS transistors with optimized profiles.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple lithography processes are performed to form different epitaxial layers, then different epitaxial layers can be formed, but over-etching and residue issues occur in boundary areas

Engineering Contradiction:
Improveability to form different epitaxial layersVSAvoidboundary area quality
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent segments the formation process into two stages: first forming both epitaxial layers simultaneously using a single lithography process, then selectively removing and replacing only the specific layer that needs modification. This segmentation avoids the boundary issues of multiple lithography processes while still achieving different epitaxial layer configurations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary formation of both epitaxial layers simultaneously before selective modification. By establishing both layers in advance using a single lithography pattern, the boundary area problems are avoided, and subsequent selective replacement is performed without introducing new lithography-related defects.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If multiple lithography processes are performed to form different epitaxial layers, then different epitaxial layers can be formed, but material residues remain in boundary areas

Engineering Contradiction:
Improveability to form different epitaxial layersVSAvoidboundary area cleanliness
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The process segments the formation into simultaneous initial creation followed by selective replacement, eliminating the need for multiple lithography steps that leave residues. The single lithography process defines all boundaries once, avoiding repeated exposure and material deposition in boundary zones.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent selectively removes (discards) the first epitaxial layer in specific regions where a different layer is needed, then replaces it with the second epitaxial layer. This selective discarding and recovering approach ensures clean boundaries without material residues from multiple lithography processes.

Inventive Principle:
Principle #34Discarding and recovering

3Adaptability or versatility

If multiple lithography processes are performed to form different epitaxial layers, then different epitaxial layers can be formed, but the distance between epitaxial layers and gates becomes inconsistent

Engineering Contradiction:
Improveability to form different epitaxial layersVSAvoiddistance consistency
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent segments the formation process so that the critical distance-setting step (single lithography) occurs once for both structures, ensuring consistency. Subsequent selective replacement does not involve lithography, so distance precision is maintained without being compromised by additional alignment steps.

Inventive Principle:
Principle #1Segmentation

4Manufacturing precision

If a single lithography process is used to form both epitaxial layers simultaneously, then boundary area issues are avoided, but different profile requirements for different transistors cannot be met

Engineering Contradiction:
Improveboundary area qualityVSAvoidprofile differentiation
Core Design Contradiction:
Manufacturing precisionVSAdaptability or versatility

Solution Approach 1:

The patent segments the formation into simultaneous initial creation (satisfying boundary quality) followed by selective modification (satisfying profile differentiation). The first epitaxial layer is formed with a first profile beside both gates, then selectively replaced by a second epitaxial layer with a different profile in specific regions, achieving both goals.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary formation of both epitaxial layers with initial uniform characteristics using single lithography (ensuring boundary quality), then performs selective replacement to create different profiles where needed (achieving profile differentiation). The preliminary uniform formation avoids boundary issues while subsequent selective modification enables differentiation.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This process enhances transistor performance by allowing a single lithography step, reducing over-etching and residue problems, and ensuring consistent distances, thereby improving the efficiency and effectiveness of MOS transistor fabrication.

Implementation Method 1

An epitaxial process including the following steps. A first gate and a second gate are formed on a substrate. Two first spacers are formed on the substrate beside the first gate and the second gate respectively. Two first epitaxial layers having first profiles are formed in the substrate beside the two first spacers respectively.

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS8895396B1Epitaxial Process of forming stress inducing epitaxial layers in source and drain regions of PMOS and NMOS structures
Publication Date: 2014.11.25 UNITED MICROELECTRONICS CORP
  • US8895396B1 patent drawing
  • US8895396B1 patent drawing
  • US8895396B1 patent drawing

AI summary

An epitaxial process includes the following steps. A first gate and a second gate are formed on a substrate. Two first spacers are formed on the substrate beside the first gate and the second gate respectively. Two first epitaxial layers having first profiles are formed in the substrate beside the two first spacers respectively. A second spacer material is formed to cover the first gate and the second gate. The second spacer material covering the second gate is etched to form a second spacer on the substrate beside the second gate and expose the first epitaxial layer beside the second spacer while reserving the second spacer material covering the first gate. The exposed first epitaxial layer in the substrate beside the second spacer is replaced by a second epitaxial layer having a second profile different from the first profile.