Epitaxial Multigate Transistor Channel Orientation

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Solution Overview

Problem

Current multigate transistor fabrication methods face challenges in forming multiple channel regions with consistent crystal orientation, which affects transistor performance and predictability across devices.

Innovation Solution

The method involves growing epitaxial silicon channels from a seed layer into openings formed in a wafer, using a selective etching process to create gate structures around the channels, allowing for multiple channel regions to be formed with the same crystal orientation, enabling more predictable and consistent transistor performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional multigate transistor fabrication methods are used, then multiple channel regions can be formed, but the crystal orientation consistency across channel regions is poor

Engineering Contradiction:
Improvecrystal orientation consistencyVSAvoidfabrication complexity
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The fabrication process segments the formation of multiple channel regions into distinct stages: first forming openings in the sacrificial layer, then selectively epitaxially growing semiconductor material in each opening from a common seed layer. This segmentation ensures each channel region develops with consistent crystal orientation while maintaining manufacturing feasibility

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The method performs preliminary actions by first creating the opening structure and preparing the seed layer before epitaxial growth. The sacrificial layer is patterned and openings are formed in advance, establishing a template that guides the subsequent epitaxial growth to ensure consistent crystal orientation across all channel regions

Inventive Principle:
Principle #10Preliminary action

2Reliability

If epitaxial growth is used to form channel regions, then crystal orientation uniformity is improved, but the number of process steps increases

Engineering Contradiction:
Improvetransistor performance predictabilityVSAvoidprocess steps
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The method merges multiple channel region formations into a single epitaxial growth process. By using a common seed layer and controlling the epitaxial growth conditions, multiple channel regions are formed simultaneously with consistent crystal orientation, improving reliability while consolidating process steps rather than increasing them

Inventive Principle:
Principle #5Merging (Combining)

3Manufacturing precision

If grain boundaries are present in channel regions, then manufacturing is simpler, but transistor performance and predictability deteriorate

Engineering Contradiction:
Improvechannel region uniformityVSAvoiddevice performance
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The method changes the fundamental parameter of crystal growth by using epitaxial growth from a seeded substrate rather than conventional deposition methods. This parameter change eliminates grain boundaries by ensuring continuous crystal growth with consistent orientation across all channel regions, simultaneously improving manufacturing precision and device performance

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the formation of multiple channel regions with the same crystal orientation, enhancing the predictability and performance of multigate transistors by ensuring uniformity across devices and reducing the impact of grain boundaries.

Implementation Method 1

An epitaxially grown silicon is grown from a seed layer into the opening

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS10103241B2Multigate transistor
Publication Date: 2018.10.16 NXP USA INC
  • US10103241B2 patent drawing
  • US10103241B2 patent drawing
  • US10103241B2 patent drawing

AI summary

A multigate transistor is formed on a wafer with a first material and a second material. Portions of the second material are selectively removed from the first material to form an opening in the first material. An epitaxially grown semiconductor material is grown from a seed layer into the opening. A portion of the first material is removed around the epitaxially grown semiconductor material in the opening and a gate material is formed in locations of the removed first material. The epitaxially grown semiconductor material in the opening serves as a channel region for a multigate transistor and the gate material serves as a gate for the multigate transistor.