Semiconductor Epitaxial Repair After Pre-Amorphization Doping
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Solution Overview
Problem
Conventional semiconductor doping processes, such as pre-amorphization implantation, often result in collateral damage to the lattice of target materials, leading to dislocation flaws and increased susceptibility to junction leakage and stress relief in epitaxial materials.
Innovation Solution
A novel semiconductor process that includes a pre-amorphization doping step followed by a low-temperature heating process and chemical cleaning to repair defects in the epitaxial layer, forming an outer spacer and removing part of the epitaxial layer to prevent dislocation and junction leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If pre-amorphization implantation is performed to form a specific amorphous region on target material, then the amorphous region formation is improved, but collateral damages occur to the lattice forming dislocation flaws
Solution Approach 1:
The patent changes the physical state parameters of the target material by controlling the amorphization process and subsequent annealing conditions. By adjusting temperature, time, and doping parameters, the material transitions between amorphous and crystalline states, achieving precise amorphous region formation while minimizing lattice damage through optimized parameter combinations.
Solution Approach 2:
The patent utilizes phase transitions between amorphous and crystalline states of the semiconductor material. The pre-amorphization implantation creates an amorphous phase, followed by controlled annealing that induces crystallization. This phase transition approach allows formation of the desired amorphous region while the subsequent crystallization process repairs lattice damage and eliminates dislocation flaws.
2Reliability
If doping step is performed to implant dopant and adjust electrical properties, then electrical property adjustment is improved, but defects are generated in the epitaxial layer
Solution Approach 1:
The patent performs preliminary amorphization implantation before the main doping step. This preliminary action prepares the lattice structure by creating a controlled amorphous region that facilitates subsequent dopant implantation. The pre-prepared amorphous structure allows for more uniform dopant distribution and reduces defect generation during the doping process, thereby maintaining both electrical property control and epitaxial layer quality.
Solution Approach 2:
The patent converts the harmful effect of implantation-induced damage into a beneficial process. The initial amorphization, which could be considered damage, is actually utilized as a useful step to create the desired amorphous region. Subsequent annealing then converts this controlled amorphization into a benefit by repairing lattice damage while maintaining the dopant distribution, thus transforming potential harm into a positive outcome for both electrical properties and material quality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces dislocation and junction leakage, enhancing the reliability and speed of semiconductor devices by repairing defects generated during the doping step.
Implementation Method 1
Implanting procedures are usually employed in the conventional semiconductor processes to implant the needed dopant
Implementation Method 2
to later reduce the residual damage post-anneal
Implementation Method 3
a chemical cleaning step is performed to remove a part of the epitaxial layer
Data Source
AI summary
The invention provides a method for forming a semiconductor structure. The method includes providing a substrate, forming a gate structure on the substrate, respectively forming an epitaxial layer on both sides of the gate structure, and performing a pre-amorphization doping step on the substrate. After the pre-amorphization doping step, a defect is generated in the epitaxial layer, an outer spacer is formed beside the gate structure, and a chemical cleaning step is performed to remove a part of the epitaxial layer, and the defect in the epitaxial layer is removed.