Epitaxial SiGe Structures With Undoped Cap Layer
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Solution Overview
Problem
The existing epitaxial SiGe structures in semiconductor devices face challenges such as increased complexity in fabrication, strain stress issues, agglomeration during the silicide process, and threshold voltage roll-off due to lattice constant differences between the SiGe epitaxial structures and the silicon substrate, which affect carrier mobility and device performance.
Innovation Solution
The introduction of an undoped cap layer with a lower Ge concentration on the epitaxial structures and an undoped under layer with a lower Ge concentration between the epitaxial structures and the substrate, both composed of SiGe, to mitigate agglomeration and threshold voltage roll-off issues, while maintaining strain stress for improved carrier mobility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the germanium concentration in the SiGe epitaxial structures is increased to improve stress and carrier mobility, then device performance is improved, but agglomeration is formed by metal and germanium during the silicide process causing serious junction leakage
Solution Approach 1:
An undoped cap layer is introduced as an intermediary between the high-germanium-concentration epitaxial SiGe structure and the metal silicide layer. This cap layer has a lower germanium concentration than the epitaxial structure but higher than the substrate, creating a gradient that prevents direct contact between high-germanium regions and metal, thereby eliminating agglomeration while preserving the stress and carrier mobility benefits of the high-germanium epitaxial layer
Solution Approach 2:
The invention changes the germanium concentration parameter by introducing a cap layer with intermediate germanium content. This creates a gradual transition in composition from the high-germanium epitaxial structure to the low-germanium substrate, preventing the formation of germanium-rich regions that would otherwise cause agglomeration during silicide processing
2Stress or pressure
If the thickness of the epitaxial SiGe structure is increased to maintain stress, then strain stress is maintained in the channel region, but the structure becomes relaxed when exceeding critical thickness and fails to cause stress to the channel region
Solution Approach 1:
The epitaxial structure is segmented into two distinct parts: a lower epitaxial SiGe layer with high germanium concentration that provides the necessary strain stress, and an upper undoped cap layer with lower germanium concentration that remains within the critical thickness limit to avoid relaxation. This segmentation allows each layer to perform its specific function without compromising the other
3Reliability
If the lattice constant difference between the SiGe epitaxial structures and the silicon substrate is large to provide strain stress, then carrier mobility is improved, but the threshold voltage roll-off occurs
Solution Approach 1:
The invention applies local quality by creating different germanium concentration zones at different locations: the epitaxial SiGe structure at the interface with the channel region maintains high germanium concentration for strain stress and high carrier mobility, while the undoped cap layer on top has lower germanium concentration to reduce lattice constant differences and prevent threshold voltage roll-off
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution prevents agglomeration and junction leakage in the silicide process and mitigates threshold voltage roll-off, resulting in improved semiconductor device performance with enhanced carrier mobility and reduced surface roughness.
Implementation Method 1
the epitaxial structures serving as the source/drain of the semiconductor device includes the undoped cap layer with lower Ge concentration formed on the surface of the epitaxial structures, therefore the agglomeration formed by the metal and Ge in the silicide process and the junction leakage are both prevented
Implementation Method 2
the epitaxial structures include a first semiconductor material having a first lattice constant and a second semiconductor material having a second lattice constant. The second lattice constant is larger than the first lattice constant
Implementation Method 3
Because the lattice constant of the epitaxial SiGe layer is larger than that of the silicon substrate, a strain stress is generated to the channel region of the meta-oxide semiconductor (MOS) transistor device. Accordingly, carrier mobility in the channel region is improved and the speed of the MOS transistor is increased
Implementation Method 4
the prior art usually forms an epitaxial layer such as a silicon germanium (hereinafter abbreviated as SiGe) layer in a single crystal substrate by performing a selective epitaxial growth (hereinafter abbreviated as SEG) method. Since the epitaxial layer has the crystalline orientation almost identical to the crystalline orientation of the substrate
Data Source
AI summary
A semiconductor device having epitaxial structures includes a gate structure positioned on a substrate, epitaxial structures formed in the substrate at two sides of the gate structure, and an undoped cap layer formed on the epitaxial structures. The epitaxial structures include a dopant, a first semiconductor material having a first lattice constant, and a second semiconductor material having a second lattice constant, and the second lattice constant is larger than the first lattice constant. The undoped cap layer also includes the first semiconductor material and the second semiconductor material. The second semiconductor material in the epitaxial structures includes a first concentration, the second semiconductor material in the undoped cap layer includes at least a first concentration, and the second concentration is lower than the first concentration.