Epitaxial Si/SiGe Superlattice Doping Gradient for Taller Memory Stacks
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing epitaxial film stacks in microelectronic devices, particularly in 3D-DRAM, suffer from crystal imperfections and defects that cause leakage, hindering the development of taller film stacks required for advanced memory devices.
Innovation Solution
A multi-layered epitaxial stack is fabricated with a dopant gradient across doped silicon-germanium and silicon mini-stacks, using a deposition process that controls the concentration of dopants like carbon and boron to manage wafer bow and achieve a predetermined threshold, thereby reducing defects and enhancing film stack integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If epitaxial film stacks are made taller for advanced memory devices, then storage capacity increases, but crystal imperfections and defects increase causing leakage
Solution Approach 1:
The patent applies parameter changes by introducing a dopant gradient in the silicon-germanium layers, where the dopant concentration varies continuously from the bottom to the top of the film stack. This gradient structure modifies the physical and chemical properties of the material at different heights, enabling better control over crystal growth and defect formation, thereby reducing leakage while maintaining tall film stack structure
Solution Approach 2:
The patent implements local quality by creating regions with different dopant concentrations at different positions within the film stack. The dopant gradient provides locally optimized properties: higher dopant concentrations in regions where defect prevention is critical, and lower concentrations where other performance characteristics are prioritized, thus addressing leakage issues in specific problem areas without compromising overall structure
2Manufacturing precision
If dopant concentration is increased to improve film integrity, then wafer bow increases exceeding predetermined threshold
Solution Approach 1:
The patent uses parameter changes by implementing a gradual dopant gradient rather than a uniform high dopant concentration. This continuous variation in dopant concentration allows the film to maintain structural integrity and reduce defects while distributing stress more evenly, thereby controlling wafer bow within acceptable thresholds
Solution Approach 2:
The patent applies dynamics by creating a non-uniform, gradient-based dopant distribution that adapts to the varying stress and structural requirements at different heights of the film stack. This dynamic composition profile optimizes both film integrity and wafer shape control, avoiding the uniform high doping that would cause excessive bow
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed method results in a multi-layered epitaxial stack with reduced wafer bow and improved structural integrity, addressing leakage issues and enabling the fabrication of taller film stacks suitable for advanced memory devices.
Implementation Method 1
epitaxial silicon and doped silicon germanium superlattice and methods for preparing the same
Implementation Method 2
vapor deposition processes for preparing the epitaxial film stacks
Implementation Method 3
The dopant has a gradient across the mini-stacks such that a concentration of dopant in the doped silicon-containing layer is different between a first film stack and a second film stack
Data Source
AI summary
Embodiments of the present disclosure generally relate to epitaxial film stacks and vapor deposition processes for preparing the epitaxial film stacks. In one or more embodiments, a multi-layered epitaxial stack is disposed on a substrate, and the multi-layered epitaxial stack contains a plurality of doped silicon-germanium and silicon mini-stacks. Each of the doped silicon germanium stack contains a doped-silicon-germanium layer disposed between a first silicon-germanium layer and a second silicon-germanium layer. Each of the doped-silicon-germanium layers independently contains a concentration of a dopant which may vary or be the same between each of the doped-silicon-germanium layers. The multi-layered epitaxial stack has a dopant gradient based on the concentration of the dopant within each of the doped-silicon-germanium layers such that the multi-layered epitaxial stack has a wafer bow value at a predetermined threshold. The multi-layered epitaxial stack may be used throughout the microelectronics industry.