Epitaxial SiGe Source Select Transistor for 3D NAND Memory
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Solution Overview
Problem
The existing 3D NAND memory structures face challenges in achieving optimal electron mobility and performance due to bandgap differences between silicon and silicon germanium (SiGe) interfaces, leading to degraded conduction and valence band offsets, which affect the NAND string channel current.
Innovation Solution
The use of epitaxial crystalline silicon germanium (SiGe) as the source side select transistor body, in direct contact with a single crystal silicon substrate, aligns the conduction and valence bands, reducing offsets and enhancing electron mobility by forming a good interface with the NAND string channel.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If a silicon to SiGe interface is formed between the source side select transistor body and the NAND string channel, then the crystalline orientation is improved, but the conduction band offset increases, degrading electron conduction
Solution Approach 1:
The patent applies homogeneity by forming the source side select transistor body from the same SiGe material as the NAND string channel, eliminating the silicon to SiGe interface. This material homogeneity ensures continuous crystalline orientation and eliminates conduction band offset, allowing electrons to flow without degradation at the interface.
2Ease of manufacture
If polysilicon is used for the NAND string channel, then the manufacturing process is simplified, but the electron mobility is reduced, resulting in low memory cell current
Solution Approach 1:
The patent changes the material parameter from polysilicon to single-crystal SiGe, fundamentally altering the electron mobility characteristic. This parameter change enables high electron mobility in the NAND string channel while maintaining compatibility with the overall manufacturing process through epitaxial growth techniques.
3Reliability
If the source side select transistor body is formed from silicon, then the interface with the single crystal silicon substrate is improved, but the conduction band offset at the SiGe junction increases, degrading performance
Solution Approach 1:
The patent uses SiGe for both the source side select transistor body and the NAND string channel, creating material homogeneity throughout the vertical stack. This eliminates the conduction band offset that would occur at a silicon-SiGe interface, while the epitaxial growth process ensures good interface quality with the silicon substrate.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves electron mobility and performance by aligning band offsets, thereby increasing the NAND string channel current and maintaining the benefits of using SiGe for the NAND string channel.
Implementation Method 1
The body of the source side select transistor comprises epitaxial crystalline silicon germanium (SiGe) in contact with the single crystal silicon substrate
Implementation Method 2
aligns the conduction and valence bands, reducing offsets and enhancing electron mobility by forming a good interface with the NAND string channel
Data Source
AI summary
Disclosed herein is a 3D memory with vertical NAND strings, and method for fabricating the same. Each vertical NAND string has a source side select transistor having a body in contact with a single crystal silicon substrate. The NAND string channel is formed from silicon germanium (SiGe), which provides for greater electron mobility than silicon. The body of the source side select transistor comprises epitaxial crystalline silicon germanium (SiGe) in contact with the single crystal silicon substrate. By epitaxial crystalline SiGe it is meant that the crystalline SiGe has the same crystalline orientation as the single crystal silicon substrate.