Epitaxial Silicon Layer Defect Reduction via Sidewall Lining
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Solution Overview
Problem
The formation of epitaxial silicon layers for vertical transistors is hindered by crystallographic defects, particularly due to lower deposition temperatures and thermal stress, which reduce surface mobility and increase defect formation, making it difficult to achieve high-quality epitaxial layers with minimal defects.
Innovation Solution
A method involving the formation of an opening in a first material over a monocrystalline substrate, lining the opposing sidewalls with a second material, growing a silicon-comprising layer epitaxially at a temperature greater than 200°C, and removing at least a portion of the second material lining before cooling to minimize thermal stress and defect propagation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If lower deposition temperatures are used for selective epitaxial growth, then surface mobility is reduced and defect formation increases, but this is necessary for selective growth in vertical transistors
Solution Approach 1:
The patent applies preliminary action by depositing the second material (oxide or nitride) on the sidewalls before the epitaxial growth process. This preliminary lining of the sidewalls with a protective material prevents defect formation at the interface during subsequent high-temperature growth, allowing the use of higher temperatures without increasing defects. The preliminary protective layer enables thermal stress management while maintaining low defect densities.
Solution Approach 2:
The patent utilizes parameter changes by varying the deposition temperature during different stages of the process. The epitaxial silicon is grown at elevated temperatures (greater than 200°C) to improve surface mobility and reduce defects, while the second material is deposited and then removed before final cooling. This dynamic temperature parameter control allows optimization of both growth quality and defect minimization.
2Manufacturing precision
If thermal stress is generated during cool-down from growth temperature, then crystallographic defects are generated after growth, but high growth temperatures are needed for quality epitaxial layers
Solution Approach 1:
The patent applies the extraction principle by removing the second material (oxide or nitride lining) from the sidewalls before cooling the epitaxial layer. This removal eliminates the source of thermal stress that would otherwise generate crystallographic defects during cool-down. By extracting the problematic interface material before the thermal stress phase, the patent achieves high-quality epitaxial layers with minimal defects.
Solution Approach 2:
The patent applies beforehand cushioning by depositing the second material on sidewalls prior to epitaxial growth. This protective layer cushions the interface during high-temperature growth, preventing initial defect formation. The material is then removed before cooling to prevent thermal stress-related defects, providing dual-phase protection.
3Ease of manufacture
If masks of oxide, nitride or other materials are used for self-aligned patterning, then the interface of the epi with these materials becomes a defect source, but masks are necessary for patterning
Solution Approach 1:
The patent applies extraction by removing the second material (oxide or nitride) that was used for self-aligned patterning before the epitaxial growth completes and before cooling. This eliminates the problematic interface between the epitaxial silicon and the mask material, preventing defect formation at the interface while retaining the patterning capability during the growth process.
Solution Approach 2:
The second material serves as an intermediary during the patterning and growth process, enabling self-aligned formation of the epitaxial layer. After serving its mediating function for patterning, it is removed to prevent it from becoming a permanent defect source, thus transitioning from useful intermediary to harmful interface.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the quality of epitaxial silicon layers by reducing thermal stress and defect formation, resulting in improved electrical properties and reduced recombination generation currents, higher breakdown voltages, and lower current leakage.
Implementation Method 1
A silicon-comprising layer is epitaxially grown from the exposed monocrystalline material within the second material-lined opening
Data Source
AI summary
The invention includes methods of forming layers comprising epitaxial silicon. In one implementation, an opening is formed within a first material received over a monocrystalline material. Opposing sidewalls of the opening are lined with a second material, with monocrystalline material being exposed at a base of the second material-lined opening. A silicon-comprising layer is epitaxially grown from the exposed monocrystalline material within the second material-lined opening. At least a portion of the second material lining is in situ removed. Other aspects and implementations are contemplated.