Epitaxial Silicon CMOS-MEMS Microphone Backplate Thickness Control
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Solution Overview
Problem
Ensuring uniform thickness of the backplate in MEMS microphones produced using time-controlled etching processes is challenging, limiting the minimum size of the microphone system and vent holes, which affects performance.
Innovation Solution
Employing epitaxial silicon processes that deposit both polycrystalline and monocrystalline silicon simultaneously, allowing for uniform thickness definition and enabling the formation of a hybrid silicon layer for the backplate, which is then used in conjunction with oxide layers to create vent holes and a membrane structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If time-controlled etching process is used to form backplate, then manufacturing process is simple, but backplate thickness uniformity deteriorates
Solution Approach 1:
The invention changes the controlling parameter for backplate thickness from time-based etching to deposition thickness control. By using epitaxial deposition where thickness is controlled by deposition parameters rather than etching duration, the process achieves both simplicity and uniformity. The backplate thickness is determined by the deposited layer thickness which can be precisely controlled, eliminating the thickness variation inherent in time-controlled etching processes.
2Volume of moving object
If backplate thickness is reduced to minimize microphone size, then overall device size decreases, but thickness uniformity control becomes more difficult with time-controlled etching
Solution Approach 1:
The invention enables precise control of backplate thickness by changing from time-controlled etching to deposition-controlled thickness. This allows manufacturing of thinner backplates with maintained uniformity, as the deposited layer thickness can be precisely controlled regardless of how thin the final backplate becomes. The minimum thickness is now limited by deposition capability rather than etching uniformity constraints.
3Area of moving object
If backplate thickness is reduced to minimize vent hole size, then vent hole dimensions decrease, but thickness uniformity deteriorates with time-controlled etching
Solution Approach 1:
The invention decouples vent hole size control from backplate thickness uniformity control by using deposition-based thickness definition. This allows the backplate to be etched with precise thickness uniformity while vent holes can be sized independently through the etching pattern. The deposited layer provides a uniform thickness baseline that enables smaller vent holes without compromising the overall backplate thickness consistency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a more uniformly defined backplate thickness, enabling smaller microphone sizes and improved performance by allowing for precise control over vent hole size and membrane movement, enhancing the overall sensitivity and efficiency of the MEMS microphone system.
Implementation Method 1
The epitaxial deposition is able to grow both polycrystalline and mono-crystalline silicon simultaneously on the same wafer and even on the same wafer surface depending upon the type of seed material that is provided at the start of the deposition process
Implementation Method 2
A plurality of vent hole locations are etched partially through the oxide layer from the front side of the structure
Implementation Method 3
A poly-crystalline silicon layer of substantially uniform thickness is then deposited on the oxide layer on the front side of the structure
Data Source
Figure 1A~1B
Figure 2A~2B
Figure 2C~2D
AI summary
A method of manufacturing a microphone using epitaxially grown silicon. A monolithic wafer structure is provided. A wafer surface of the structure includes poly-crystalline silicon in a first horizontal region and mono-crystalline silicon in a second horizontal region surrounding a perimeter of the first horizontal region. A hybrid silicon layer is epitaxially deposited on the wafer surface. Portions of the hybrid silicon layer that contact the poly-crystalline silicon use the poly-crystalline silicon as a seed material and portions that contact the mono-crystalline silicon use the mono-crystalline silicon as a seed material. As such, the hybrid silicon layer includes both mono-crystalline silicon and poly-crystalline silicon in the same layer of the same wafer structure. A CMOS/membrane layer is then deposited on top of the hybrid silicon layer.