Epitaxial Silicon Wafer Flatness via Reduced Chamfer Width

Solution Overview

Problem

Existing methods for producing epitaxial silicon wafers struggle to achieve high flatness at the peripheral portion due to growth rate orientation dependence, with conventional methods either increasing production costs or failing to control film thickness profiles effectively.

Innovation Solution

Reducing the width of the chamfer on the silicon wafer's end to 200 μm or less during epitaxial growth, specifically for (100) or (110) plane orientations, to suppress growth rate orientation dependence and enhance flatness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If mirror polishing is applied to the epitaxial layer surface to improve flatness, then surface flatness is improved, but production cost increases and process damage occurs

Engineering Contradiction:

Improvesurface flatnessVSAvoidproduction cost

Core Design Contradiction:

Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The chamfer width is controlled at 200 μm or less before epitaxial growth begins, which preliminarily sets up the geometric condition that will suppress growth rate orientation dependence during the subsequent epitaxial process, eliminating the need for post-growth polishing

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The invention changes the geometric parameter of chamfer width to 200 μm or less, which fundamentally alters the growth dynamics during epitaxial deposition, suppressing orientation-dependent growth rate variations and achieving inherent flatness without additional processing

Inventive Principle:

Principle #35Parameter changes

2Manufacturing precision

If mirror polishing is applied to the epitaxial layer surface to improve flatness, then surface flatness is improved, but process damage occurs due to polishing

Engineering Contradiction:

Improvesurface flatnessVSAvoidprocess damage

Core Design Contradiction:

Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The chamfer width is controlled at 200 μm or less before epitaxial growth begins, which preliminarily sets up the geometric condition that will suppress growth rate orientation dependence during the subsequent epitaxial process, eliminating the need for post-growth polishing

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The invention converts the potential harm of orientation-dependent growth variations into a benefit by using the chamfer geometry to naturally suppress these variations, achieving flatness through the growth process itself rather than through corrective polishing that causes damage

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

3Ease of manufacture

If conventional chamfer width is used, then manufacturing is easier, but growth rate orientation dependence causes poor flatness at peripheral portions

Engineering Contradiction:

Improvechamfer fabricationVSAvoidperipheral flatness

Core Design Contradiction:

Ease of manufactureVSManufacturing precision

Solution Approach 1:

The invention changes the geometric parameter of chamfer width to 200 μm or less, which fundamentally alters the growth dynamics during epitaxial deposition, suppressing orientation-dependent growth rate variations and achieving inherent flatness without additional processing

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in epitaxial silicon wafers with high flatness at the peripheral portion, as evidenced by a PV value of 12.5 or less, effectively minimizing film thickness variations and improving edge exclusion zone flatness.

Implementation Method 1

An epitaxial silicon wafer is a wafer obtained by spraying a silicon source gas on a silicon wafer serving as a substrate to grow an epitaxial layer

Methodology Applied

Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS9631297B2Method of producing epitaxial silicon wafer and epitaxial silicon wafer

Publication Date: 2017.04.25 SUMCO CORP

AI summary

Provided is a method of producing an epitaxial silicon wafer which has high flatness at the peripheral portion and an epitaxial silicon wafer obtained by the method. In the method of producing an epitaxial silicon wafer, an epitaxial layer is formed on the top surface of a silicon wafer with a chamfered end having a width of 200 μm or less, which surface has a surface orientation of the (100) plane or the (110) plane.