Epitaxial Source-Drain Fabrication via Tilted Ion Implantation
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Solution Overview
Problem
The existing techniques for fabricating semiconductor devices with epitaxial semiconductor source and drain regions face challenges due to the geometry and extended height of the epitaxial material, which complicates tilted ion implantation processes, particularly for MOSFET transistors, as it becomes difficult to perform effective ion implantation after the formation of stress-inducing material at the source and drain regions.
Innovation Solution
A method is developed that involves forming gate structures with silicon nitride caps, performing tilted ion implantation to create ion implantation masks, and then forming epitaxial semiconductor material in source and drain regions, ensuring that the ion implantation occurs before the epitaxial material formation, thereby addressing the challenges of tilted ion implantation and stress-induced geometry issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If epitaxial semiconductor material is overfilled to extended height above the semiconductor material surface to enhance stress-inducing benefits, then the stress-inducing benefits are enhanced, but tilted ion implantation of the underlying semiconductor material becomes difficult or impossible
Solution Approach 1:
The patent performs tilted ion implantation before forming the epitaxial semiconductor regions. By conducting the ion implantation process at the semiconductor material surface level before the epitaxial overfill is created, the channel region receives the necessary ion implantation without being blocked by the extended height epitaxial material that will later provide stress-inducing benefits
Solution Approach 2:
The fabrication process is segmented into distinct sequential steps: first performing tilted ion implantation on the semiconductor material, then forming the epitaxial semiconductor regions with extended height. This segmentation allows each process to be optimized independently without interference
2Ease of manufacture
If tilted ion implantation is performed before creating epitaxial semiconductor regions, then effective ion implantation is achieved, but the stress-inducing benefits are reduced compared to extended height epitaxial structures
Solution Approach 1:
The ion implantation is performed as a preliminary action before the epitaxial overfill is created. This sequencing ensures that the ion implantation can be effectively performed on the channel region, and the subsequent epitaxial growth with extended height provides the stress-inducing benefits that would otherwise be compromised
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for precise and effective ion implantation in the channel region, facilitating the formation of epitaxial semiconductor source and drain regions that enhance the stress-inducing benefits while avoiding complications arising from the extended height of the epitaxial material, thus improving the fabrication process for semiconductor devices.
Implementation Method 1
subjecting the first covered gate structure to a tilted ion implantation procedure, while the ion implantation mask inhibits ion implantation at the second covered gate structure
Implementation Method 2
forms regions of epitaxial semiconductor material corresponding to source and drain regions for the first gate structure
Data Source
AI summary
A method of fabricating a semiconductor device structure begins by forming a layer of oxide material overlying a first gate structure having a first silicon nitride cap and overlying a second gate structure having a second silicon nitride cap. The first gate structure corresponds to a p-type transistor to be fabricated, and the second gate structure corresponds to an n-type transistor to be fabricated. The method continues by performing a tilted ion implantation procedure to implant ions of an impurity species in a channel region of semiconductor material underlying the first gate structure, during which an ion implantation mask protects the second gate structure. Thereafter, the ion implantation mask and the layer of oxide material are removed, and regions of epitaxial semiconductor material are formed corresponding to source and drain regions for the first gate structure. Thereafter, the first silicon nitride cap and the second silicon nitride cap are removed.