Epitaxial Source/Drain Formation Without Dummy Gate Overgrowth
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Solution Overview
Problem
Existing processes for forming multi-gate devices often result in mushroom-like structures due to epitaxial growth on exposed dummy gate stacks, leading to shorts and defects when the dummy gate stacks are replaced with metal gate structures.
Innovation Solution
A method is introduced where a gate spacer is deposited over dummy gate stacks, and patterned photoresist layers are used to prevent semiconductor material deposition on terminal end portions during source/drain feature formation, ensuring the gate spacers remain thicker on these areas, thus preventing epitaxial growth and subsequent defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a gate spacer is deposited over dummy gate stacks before source/drain recesses are formed, then the gate spacer provides structural support and defines gate dimensions, but the gate spacer may be compromised and expose portions of the dummy gate stack, leading to mushroom-like epitaxial growth and subsequent shorts
Solution Approach 1:
The patent applies preliminary action by depositing an additional layer of gate spacer material specifically over the terminal end portions of the dummy gate stacks before the epitaxial deposition process. This pre-deposition ensures that even if some gate spacer is removed or compromised during subsequent processing, the terminal end portions maintain sufficient thickness to prevent exposed dummy gate stack surfaces that would cause mushroom-like epitaxial growth and shorts.
Solution Approach 2:
The patent implements local quality by applying different gate spacer thicknesses to different regions of the dummy gate stack. The terminal end portions receive an additional layer of gate spacer material, making them locally thicker than the central portions. This localized enhancement provides targeted protection where it is most needed to prevent epitaxial growth-induced shorts, while maintaining overall gate spacer functionality throughout the structure.
2Manufacturing precision
If the gate spacer thickness is reduced to maintain consistency, then manufacturing precision is improved, but the gate spacer becomes more susceptible to compromise and exposure during processing
Solution Approach 1:
The patent uses preliminary action by pre-depositing additional gate spacer material over the terminal end portions before any processing that might compromise the gate spacer. This advance preparation ensures that the terminal end portions have a built-in buffer of extra material thickness that protects against exposure during subsequent etching, recess formation, or other processing steps, thereby preventing the harmful effect of gate spacer exposure without requiring overall thickness increase.
Solution Approach 2:
The patent applies beforehand cushioning by creating an additional layer of gate spacer material that serves as a protective buffer over the terminal end portions. This cushioning layer is deposited in advance to compensate for potential material removal or thinning that may occur during processing, ensuring that the gate spacer maintains sufficient thickness to prevent exposure and subsequent epitaxial growth even under varying process conditions.
3Reliability
If photoresist layers are used to cover terminal end portions during source/drain feature formation, then epitaxial growth is prevented on these areas, but the process complexity increases
Solution Approach 1:
The patent applies preliminary action by depositing the additional gate spacer material layer over the terminal end portions before the source/drain recess formation and epitaxial deposition processes. This pre-deposition creates a physical barrier that prevents epitaxial growth on the terminal end portions without requiring photoresist masking during the epitaxial step, thereby achieving reliability improvement while reducing process complexity compared to using photoresist layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach prevents undesirable epitaxial growth on terminal end surfaces, reducing the likelihood of shorts and enhancing the reliability of multi-gate devices by maintaining a consistent gate spacer thickness, even after source/drain feature formation.
Implementation Method 1
depositing a gate spacer layer over the workpiece
Implementation Method 2
epitaxially forming source/drain features over the recessed source/drain regions
Data Source
AI summary
Semiconductor structures and methods are provided. A method according to the present disclosure includes providing a workpiece that includes a plurality of active regions including channel regions and source/drain regions, and a plurality of dummy gate stacks intersecting the plurality of active regions at the channel regions, the plurality of dummy gate stacks including a device portion and a terminal end portion. The method further includes depositing a gate spacer layer over the workpiece, anisotropically etching the workpiece to recess the source/drain regions and to form a gate spacer from the gate spacer layer, forming a patterned photoresist layer over the workpiece to expose the device portion and the recessed source/drain regions while the terminal end portion is covered, and after the forming of the patterned photoresist layer, epitaxially forming source/drain features over the recessed source/drain regions.