3D Semiconductor Device Formation With Epitaxial Sources and Drains
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Solution Overview
Problem
The number of stacked layers in semiconductor devices is limited due to limitations in the manufacturing process, particularly in forming sources and drains using ion implantation, which restricts the development of 3D semiconductor structures.
Innovation Solution
A method involving the formation of semiconductor devices with stacked structures that include semiconductor pillars, word line pillars, sources, drains, bit lines, and capacitors, where sources and drains are formed by epitaxial growth, and bit lines and capacitors are positioned perpendicular to each other, allowing for a non-limited number of stacked layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If ion implantation is used to form sources and drains, then the manufacturing process is simple, but the number of stacked layers is limited
Solution Approach 1:
The patent changes the manufacturing method parameter from ion implantation to epitaxial growth for forming sources and drains. This parameter change enables the formation of high-aspect-ratio structures with continuous crystal growth, allowing for increased number of stacked layers while maintaining manufacturing feasibility through controlled epitaxial processes
Solution Approach 2:
The patent transitions from planar device architecture to three-dimensional stacked architecture. By forming vertical semiconductor pillars and stacking multiple layers in the vertical dimension, the device achieves higher integration density and increased number of stacked layers, moving beyond the limitations of two-dimensional manufacturing
2Productivity
If the number of stacked layers is increased, then the 3D development is improved, but the manufacturing process complexity increases
Solution Approach 1:
The patent divides the semiconductor device into multiple discrete stacked layers, each containing semiconductor pillars, sources, drains, and interlayer insulating films. This segmentation allows for modular manufacturing where each layer can be formed and processed independently, then stacked to achieve high layer counts without proportionally increasing overall process complexity
Solution Approach 2:
The patent employs universal manufacturing processes such as epitaxial growth for forming both semiconductor pillars and sources/drains, and atomic layer deposition for forming multiple insulating and conductive layers. These multi-functional processes can be applied repeatedly across different layers, reducing the need for specialized processes for each layer and thereby controlling device complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enhances the performance of semiconductor devices by enabling continuous reduction in dimension and improving the number of stacked layers, mimicking 3D development like computer flash memory devices.
Implementation Method 1
Sources and drains are formed respectively on either side of the semiconductor pillars surrounded by the word line pillars by an epitaxial growth process
Data Source
AI summary
A method for forming a semiconductor device includes the following operations. A stacked structure is provided, which includes a substrate, and sacrificial layers and semiconductor layers alternately stacked on surface of the substrate. Multiple first grooves and semiconductor pillars extending in first direction are included in the sacrificial layers and the semiconductor layers. Word line pillars are formed in second direction, intersect with the semiconductor pillars and surround the semiconductor pillars. Sources and drains are formed respectively on either side of the semiconductor pillars surrounded by the word line pillars by an epitaxial growth process. Bit lines are formed on a side of the sources or the drains, are connected with same, and extend in third direction. The first, second and third directions are pairwise perpendicular. Capacitors are formed on a side of the sources or the drains where the bit lines are not formed to form a semiconductor device.