Epitaxial Source/Drain Structures for Strain Engineering

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Solution Overview

Problem

The complexity of semiconductor fabrication increases due to the need for different strain stresses in epitaxial source/drain structures for various conductivity types and functions, making it challenging to design and fabricate semiconductor devices with improved performance.

Innovation Solution

The semiconductor devices incorporate first and second source/drain structures with different epitaxial concentrations and shapes or depths, providing distinct strain stresses for transistors of the same conductivity type, allowing for tailored stress magnitudes based on function and critical dimension size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If epitaxial structures are used to improve device performance through strain stress, then carrier mobility and device speed are improved, but fabrication complexity and process control difficulty increase

Engineering Contradiction:
Improvedevice performanceVSAvoidfabrication complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies universality by using a single epitaxial growth process to serve multiple functions: it simultaneously provides strain stress for different conductivity types (n-type and p-type) and different device functions (drive current enhancement and threshold voltage control). The epitaxial structure is configured differently in various regions but formed through the same fundamental process, reducing the need for separate fabrication steps for different device requirements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent applies local quality by varying the epitaxial concentration, thickness, and composition of the semiconductor layer in different spatial regions of the device. Specifically, different epitaxial concentrations are used in source/drain regions versus channel regions, and different compositions are applied to accommodate different conductivity types. This allows each region to have optimized properties for its specific function while using the same overall epitaxial formation process.

Inventive Principle:
Principle #3Local quality

2Reliability

If different strain stresses are required for devices of different conductivity types and functions, then device performance is optimized, but design and fabrication difficulty increase

Engineering Contradiction:
Improvedevice performanceVSAvoidfabrication ease
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies parameter changes by systematically varying the epitaxial concentration, layer thickness, and material composition parameters during the epitaxial growth process. For n-type devices, one set of epitaxial parameters is used, while for p-type devices, different parameters are applied. The same epitaxial process equipment and methodology are used, but with adjustable parameters that accommodate different device requirements, thereby optimizing performance without increasing fundamental fabrication complexity.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables semiconductor devices to satisfy diverse strain stress requirements, enhancing carrier mobility and device performance while simplifying the fabrication process by allowing for different stress magnitudes and shapes in epitaxial structures.

Implementation Method 1

Because the lattice constant of the epitaxial SiGe layer is larger than that of the silicon substrate, a strain stress is generated to the channel region of the meta-oxide semiconductor (hereinafter abbreviated as MOS) transistor device. Accordingly, carrier mobility in the channel region is improved

Methodology Applied
Scientific EffectStrain stress: Deformation

Data Source

PatentUS8866230B2Semiconductor devices
Publication Date: 2014.10.21 MARLIN SEMICON LTD
  • US8866230B2 patent drawing
  • US8866230B2 patent drawing
  • US8866230B2 patent drawing

AI summary

Semiconductor devices include a substrate, a first gate structure and a second gate structure positioned on the substrate, and a first source/drain formed in the substrate respectively at two sides of the first gate structure and a second source/drain formed in the substrate respectively at two sides of the second gate structure. The first gate structure and the second gate structure include a same conductivity type. The first source/drain and the second source/drain are different.