Source/Drain Epitaxial Spacer Profiles to Limit Bridging Defects
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Solution Overview
Problem
The scaling down of semiconductor devices has introduced short-channel effects (SCEs), which reduce off-state current and device performance, and larger source/drain epitaxial structures can form defects like bridging defects, degrading performance and yield, while achieving optimized dimensions for both n-type and p-type structures with the same process conditions is challenging.
Innovation Solution
The formation of spacer layers with specific dielectric materials and controlled etching processes to create optimized dimensions and profiles for n-type and p-type source/drain epitaxial structures, allowing for cone and diamond shapes respectively, which reduces SCEs and defects, and improves device performance and yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If source/drain epitaxial structures are made larger to reduce contact resistance, then device performance improves, but bridging defects increase and yield degrades
Solution Approach 1:
The patent applies different dielectric materials with different etch selectivities to different regions (n-type vs p-type) to create locally optimized etching conditions. This allows precise control of epitaxial structure dimensions in each region, achieving adequate size for low contact resistance while preventing excessive growth that causes bridging defects.
Solution Approach 2:
The patent changes the dielectric material parameters (etch selectivity, material composition) between n-type and p-type regions to control the etching process. By adjusting these parameters, the epitaxial structures achieve optimized dimensions that balance contact resistance reduction with defect prevention.
2Ease of manufacture
If conventional process conditions are used for both n-type and p-type structures, then manufacturing simplicity is maintained, but optimized dimensions cannot be achieved for both types
Solution Approach 1:
Different dielectric materials are applied to n-type and p-type regions to create locally optimized etching conditions. This allows each region to achieve its ideal epitaxial structure dimensions while using a single unified process flow, maintaining manufacturing simplicity without sacrificing precision.
3Manufacturing precision
If spacer layers with different dielectric materials are used for n-type and p-type structures, then optimized dimensions and profiles are achieved, but device complexity increases
Solution Approach 1:
The patent implements local quality by using different dielectric materials only where needed (n-type vs p-type regions) rather than throughout the entire device. This targeted approach achieves precise dimensional control for each region while minimizing the overall increase in process complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves device performance by 2% to 10% and process yield by 2% to 20% by controlling the dimensions and profiles of source/drain epitaxial structures, reducing bridging defects and enhancing contact resistance.
Implementation Method 1
The formation of spacer layers with specific dielectric materials and controlled etching processes to create optimized dimensions and profiles
Implementation Method 2
controlled etching processes to create optimized dimensions and profiles
Data Source
AI summary
The present disclosure describes a method of forming a semiconductor device having epitaxial structures with optimized dimensions. The method includes forming first and second fin structures on a substrate, forming a spacer layer on the first and second fin structures, forming a first spacer structure adjacent to the first fin structure, and forming a first epitaxial structure adjacent to the first spacer structure. The first and second fin structures are separated by an isolation layer. The first spacer structure has a first height above the isolation layer. The method further includes forming a second spacer structure adjacent to the second fin structure and forming a second epitaxial structure adjacent to the second spacer structure. The second spacer structure has a second height above the isolation layer greater than the first height. The second epitaxial structure includes a type of dopant different from the first epitaxial structure.