Epitaxial Superlattice Buffer for GaN HEMT Stress Management

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Solution Overview

Problem

Existing semiconductor devices face issues with substrate cracking due to lattice and thermal mismatch between epitaxial material layers, leading to stress accumulation and potential wafer curvature, which affects the electrical properties and manufacturing yield.

Innovation Solution

A semiconductor structure with an epitaxial stack comprising multiple superlattice parts, where each part consists of alternately stacked sub-layers of aluminum nitride and aluminum gallium nitride with varying mole fractions and thicknesses, is used to mitigate stress and prevent wafer curvature, including a seed layer on a substrate and insulating layers to encapsulate the base.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If epitaxial material layers are formed with increased thickness to improve device performance, then electrical properties are enhanced, but stress accumulates and causes substrate cracking

Engineering Contradiction:

Improveelectrical propertiesVSAvoidsubstrate integrity

Core Design Contradiction:

ReliabilityVSStrength

Solution Approach 1:

The epitaxial buffer layer is segmented into multiple superlattice parts (first superlattice part and second superlattice part) with different lattice constants. Each superlattice part consists of alternating layers with different aluminum mole fractions, creating a stepped gradient structure that divides the total thickness into manageable segments with controlled stress characteristics.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different regions of the epitaxial buffer layer have different local compositions and lattice constants. The first superlattice part has a first lattice constant while the second superlattice part has a second lattice constant, creating local variations in material properties that progressively accommodate the lattice mismatch between the substrate and the active device layers.

Inventive Principle:

Principle #3Local quality

2Reliability

If heterojunction epitaxial layers are formed to improve electrical performance, then device functionality is enhanced, but lattice mismatch and thermal mismatch induce stress and cause wafer curvature

Engineering Contradiction:

Improveelectrical performanceVSAvoidwafer flatness

Core Design Contradiction:

ReliabilityVSShape

Solution Approach 1:

The lattice constant is gradually changed through the epitaxial buffer layer by varying the aluminum mole fraction in AlGaN layers. The first superlattice part has a first lattice constant and the second superlattice part has a second lattice constant, creating a stepped gradient that progressively adjusts the lattice parameter to match between the substrate and the active device layers, thereby reducing stress-induced wafer curvature.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The epitaxial buffer layer is constructed as a composite material system with multiple superlattice parts, each consisting of alternating layers of AlGaN with different aluminum mole fractions. This composite structure combines materials with different lattice constants in a controlled sequence, enabling progressive stress management while maintaining the desired electrical properties.

Inventive Principle:

Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed structure significantly reduces wafer curvature, prevents substrate cracking, and enhances the electrical performance and uniformity of semiconductor devices, thereby increasing production yield.

Implementation Method 1

The lattice mismatch between the heterojunction of the epitaxial material layers (e.g. the lattice constants of the upper and lower material layers are different) and the thermal mismatch between the epitaxial material layer and the substrate will induce extra stress in the epitaxial material layers.

Methodology Applied

Scientific EffectLattice mismatch:

Implementation Method 2

Methodology Applied

Scientific EffectThermal mismatch: Thermal Expansion

Implementation Method 3

this stress accumulates as the thicknesses of the epitaxial material layers increase. When the thicknesses of the epitaxial material layers exceed the critical thickness, the stress begins to release continuously, and even results in the substrate cracking.

Methodology Applied

Scientific EffectStress accumulation:

Data Source

PatentUS11387356B2Semiconductor structure and high-electron mobility transistor device having the same

Publication Date: 2022.07.12 VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION

AI summary

A semiconductor structure includes a seed layer on a substrate and an epitaxial stack on the seed layer. The epitaxial stack includes a first superlattice part and a second superlattice part on the first superlattice part. The first superlattice part includes first units repetitively stacked M1 times on the seed layer. Each first unit includes a first sub-layer that is an Aly1Ga1-y1N layer, and a second sub-layer that is an Alx1Ga1-x1N layer, wherein y1<x1. The second superlattice part includes second units repetitively stacked M2 times on the first superlattice part. Each second unit includes a third sub-layer that is an Aly2Ga1-y2N layer, and a fourth sub-layer that is an Alx2Ga1-x2N layer, wherein y2<x2. M1 and M2 are positive integers, 0≤x1, y1 and y2<1, 0<x2≤1, and x1<x2, or x1=x2 and y1<y2.