Epitaxial Wafer Defect Minimization via Buffer Layer Segmentation

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Solution Overview

Problem

Conventional electronic elements fabricated using sapphire or silicon substrates fail to meet performance requirements due to unsatisfactory wafer quality, particularly in silicon carbide-based elements, which suffer from defects and surface roughness issues.

Innovation Solution

An epitaxial wafer is developed with a substrate and epitaxial layers having specific doping concentrations and thicknesses, where the second semiconductor layer acts as a buffer to minimize defects and optimize growth conditions, ensuring continuous growth from the first to the third semiconductor layer, reducing surface roughness and defect density.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional sapphire or silicon substrates are used for fabricating electronic elements, then the fabrication process is straightforward, but the wafer quality and performance requirements are not satisfied due to defects and surface roughness

Engineering Contradiction:
Improvewafer qualityVSAvoidepitaxial layer structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The epitaxial layer is divided into three distinct semiconductor layers (first, second, and third layers) with different doping concentrations and thicknesses. This segmentation allows each layer to perform specific functions: the first layer provides a foundation, the second layer acts as a buffer to minimize defects, and the third layer enables continuous growth while controlling surface roughness, collectively achieving high wafer quality

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each semiconductor layer is assigned a specific doping concentration tailored to its functional requirements. The first layer has a first doping concentration, the second layer has a second doping concentration between the first and third, and the third layer has a third doping concentration. This local quality optimization ensures that each region contributes optimally to defect minimization and surface roughness control

Inventive Principle:
Principle #3Local quality

2Reliability

If silicon carbide is used for electronic elements, then high performance is achieved, but the wafer quality is not satisfactory due to internal defects and surface roughness

Engineering Contradiction:
Improveelectronic element performanceVSAvoidwafer quality
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The second semiconductor layer is grown preliminarily between the first and third layers to act as a buffer that minimizes internal defects before the third layer is formed. This preliminary action prevents defect propagation and ensures that the subsequent third layer can grow continuously with controlled surface roughness, thereby achieving both high reliability and manufacturing precision

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The second semiconductor layer serves as an intermediary between the first and third layers. It has a doping concentration between the first and third doping concentrations, which facilitates smooth transition and continuous growth while minimizing lattice mismatch and internal defects, thus improving both wafer quality and electronic element performance

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If the epitaxial layer is grown quickly, then productivity is improved, but internal defects and surface roughness increase

Engineering Contradiction:
Improveepitaxial growth speedVSAvoiddefect density and surface roughness
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The epitaxial growth process is segmented into three stages corresponding to three semiconductor layers with different doping concentrations. This segmentation allows the growth to proceed in controlled phases, where the second layer's intermediate doping concentration facilitates continuous growth without the harmful effects of rapid single-stage growth, thereby maintaining both productivity and manufacturing precision

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The doping concentration parameter is changed progressively across the three layers. The second layer's doping concentration is specifically set between the first and third doping concentrations, which optimizes the growth conditions and minimizes internal defects and surface roughness while maintaining efficient growth speed, thus resolving the contradiction between productivity and manufacturing precision

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The epitaxial wafer minimizes internal and surface defects, enhancing the quality of electronic elements, such as power and light-emitting devices, by optimizing growth conditions and doping concentrations, resulting in improved electrical and optical characteristics and increased product reliability.

Implementation Method 1

an epitaxial layer on the substrate. The epitaxial layer includes a first semiconductor layer disposed on the substrate

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS9793355B2Epitaxial wafer and switch element and light-emitting element using same
Publication Date: 2017.10.17 LX SEMICON CO LTD
  • US9793355B2 patent drawing
  • US9793355B2 patent drawing
  • US9793355B2 patent drawing

AI summary

An epitaxial wafer comprises an epitaxial layer disposed on a substrate. The epitaxial layer comprises first to third semiconductor layers. The third semiconductor layer has a thickness that is thicker than that of the first semiconductor layer. A second doping density of the second semiconductor layer is between a first doping density of the first semiconductor layer and a third doping density of the third semiconductor layer.