Epitaxial Wafer Channel Structure for Current Collapse Suppression
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Solution Overview
Problem
In epitaxial wafers with a back-barrier layer formed of AlxGayInzN crystals, the release of In and associated surface roughness lead to a higher C concentration in the lower channel layer, causing electron trapping and current collapse.
Innovation Solution
The epitaxial wafer structure includes a lower channel layer with a higher C concentration doped with Si, which compensates for the C acceptor traps, and a back-barrier layer with a Si concentration higher than the C concentration to suppress current collapse.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Shape
If the lower channel layer is grown at a low temperature to suppress In release from the back-barrier layer, then surface roughness is reduced, but C concentration increases causing current collapse
Solution Approach 1:
The patent applies local quality by creating two distinct channel layers with different properties: the lower channel layer is grown at low temperature to maintain surface flatness, while the upper channel layer is grown at high temperature to achieve low C concentration. Each layer performs its specific function optimally, resolving the contradiction between surface quality and electrical performance.
Solution Approach 2:
The channel layer is segmented into two separate layers with different growth conditions and compositions. This segmentation allows independent optimization of each layer's properties - the lower layer for surface quality and the upper layer for electrical performance - thereby resolving the technical contradiction.
2Speed
If the gate length is shortened to increase current-gain cutoff frequency, then high-frequency performance is improved, but leak current through the buffer layer increases
Solution Approach 1:
The back-barrier layer is formed in advance between the buffer layer and channel layer to raise the conduction band energy of the buffer layer before the channel operations begin. This preliminary action creates an energy barrier that suppresses leak current, enabling short gate length designs without excessive leakage.
3Reliability
If Si is doped into the lower channel layer to compensate C traps, then current collapse is suppressed, but manufacturing complexity increases
Solution Approach 1:
The patent merges the C compensation function into the lower channel layer formation process itself by adding Si doping during the low-temperature growth of the lower channel layer. This combines surface quality maintenance and C trap compensation into a single integrated process step, reducing overall manufacturing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The Si doping in the lower channel layer and back-barrier layer effectively compensates for C traps, suppressing current collapse and maintaining high power output and transient response characteristics.
Implementation Method 1
the lower channel layer has a C concentration higher than the upper channel layer and contains Si
Implementation Method 2
The Si doping in the lower channel layer and back-barrier layer effectively compensates for C traps
Implementation Method 3
a back-barrier layer formed of a crystal having a composition formula represented by AlxGayInzN (x+y+z=1, y>0, z>0) between the channel layer and the buffer layer to raise the energy of the conduction band of the buffer layer, thereby suppressing the leak current
Implementation Method 4
Due to heterojunction of these layers, a highly concentrated two-dimensional electron gas (2DEG) is formed at the interface between these layers
Data Source
AI summary
An epitaxial wafer according to the present disclosure includes: a substrate; a buffer layer formed of a crystal having the composition formula represented by AlxGayInzN (x+y+z=1, y>0) on the substrate; a back-barrier layer formed of a crystal having the composition formula represented by AlxGayInzN (x+y+z=1, y>0, z>0) on the buffer layer; a channel layer formed of a crystal having the composition formula represented by AlxGayInzN (x+y+z=1, y>0) on the back-barrier layer; and an electron-supply layer formed of a crystal having the composition formula represented by AlxGayInzN (x+y+z=1, x>0) on the channel layer. The channel layer is constituted with an upper channel layer underneath the electron-supply layer and a lower channel layer on the back-barrier layer, and the lower channel layer has a C concentration higher than the upper channel layer and contains Si.