Epitaxial Wafer Placement Using Resistance-Based Offset Correction

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Solution Overview

Problem

Existing processes for producing semiconductor wafers with epitaxial layers face challenges in achieving uniform thickness and reducing particle formation due to non-concentric placement of substrate wafers on the susceptor, which is exacerbated by thermal stresses and varying substrate resistances.

Innovation Solution

A process that calculates resistance-dependent corrective precepts for placing substrate wafers on a susceptor, using distinct averaging methods for different resistance ranges to accurately position the wafers and ensure concentric placement, thereby improving the edge geometry and reducing particle formation during epitaxial layer deposition.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a single corrective precept is used for all substrate wafers regardless of resistance, then the placement process is simple, but the uniformity of epitaxial layer thickness deteriorates

Engineering Contradiction:

Improveplacement process simplicityVSAvoidepitaxial layer thickness uniformity

Core Design Contradiction:

Ease of manufactureVSManufacturing precision

Solution Approach 1:

The corrective precept is changed based on the specific resistance parameter of the substrate wafer. The method divides wafers into different resistance ranges and applies different corrective precepts for each range, optimizing placement position to achieve concentric alignment and uniform epitaxial layer thickness while maintaining process simplicity

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

Different corrective precepts are applied to different groups of wafers based on their resistance characteristics. This local differentiation ensures that each wafer type receives the optimal placement correction for its specific properties, improving overall manufacturing precision without complicating the entire process

Inventive Principle:

Principle #3Local quality

2Productivity

If substrate wafers are placed without corrective precept, then the placement operation is fast, but particle formation increases

Engineering Contradiction:

Improveplacement operation speedVSAvoidparticle formation

Core Design Contradiction:

ProductivityVSObject-generated harmful factors

Solution Approach 1:

The corrective precept is calculated in advance based on historical data and resistance ranges. This preliminary preparation allows the robot to quickly place wafers with minimal real-time calculation, maintaining high productivity while preventing particle formation through pre-determined optimal positioning

Inventive Principle:

Principle #10Preliminary action

3Measurement precision

If the center of substrate wafer lies above the center of susceptor, then the placement appears centered, but thermal stresses cause deviation during deposition

Engineering Contradiction:

Improveinitial placement accuracyVSAvoidconcentric alignment during deposition

Core Design Contradiction:

Measurement precisionVSManufacturing precision

Solution Approach 1:

The corrective precept applies an opposite deviation to counteract the expected thermal stress effect. By intentionally placing the wafer center slightly offset from the susceptor center in the opposite direction of anticipated thermal drift, the system achieves concentric alignment during the actual deposition process despite thermal expansion forces

Inventive Principle:

Principle #9Preliminary anti-action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the uniformity of the epitaxial layer thickness and decreases the risk of particle formation by precisely adjusting the placement of substrate wafers based on their specific resistances, leading to improved semiconductor wafer quality.

Implementation Method 1

the robot moves the substrate wafer into a placement position and places it on the susceptor, with a corrective precept causing a center of the substrate wafer not to lie above a center of the susceptor in the placement position

Methodology Applied

Scientific EffectPositional deviation correction:

Implementation Method 2

depositing the epitaxial layer on the substrate wafer

Methodology Applied

Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Data Source

PatentUS20240186168A1Process for manufacturing semiconductor wafers containing a gas-phase epitaxial layer in a deposition chamber

Publication Date: 2024.06.06 SILTRONIC AG

AI summary

A process produces semiconductor wafers with epitaxial layer deposited from a gas phase in a deposition chamber. The process includes placing a substrate wafer on a susceptor with circular perimeter by a robot that moves the substrate wafer into a placement position and places it on the susceptor with a corrective precept causing a center of the substrate wafer not to lie above a center of the susceptor; and depositing the epitaxial layer on the substrate wafer. A first number of substrate wafers having a specific resistance which falls within a first range are moved into the placement position with a first corrective precept, and a second number of substrate wafers having a specific resistance which falls within a second range are moved by the robot with a second corrective precept, differs from the first corrective precept.