Epitaxial Wafer Placement Correction by Specific Resistance

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Solution Overview

Problem

Existing methods for producing semiconductor wafers with epitaxial layers face challenges in achieving uniform thickness and preventing particle formation due to positional deviations of substrate wafers on the susceptor, which are not accurately corrected by relying solely on average positional deviations from previous coating processes.

Innovation Solution

A method that calculates correction specifications for placing substrate wafers on a susceptor based on their specific electrical resistance, distinguishing between different ranges to provide tailored corrections for precise centering, thereby accounting for the influence of dopant proportion and thermal stresses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a single correction specification is used for all substrate wafers based on average positional deviation, then the correction process is simple, but the centering accuracy varies for wafers with different specific resistance

Engineering Contradiction:
Improvecentering accuracyVSAvoidcorrection specification system
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies local quality by differentiating correction specifications based on substrate properties. Instead of using a uniform correction value for all wafers, the system categorizes substrates by specific resistance ranges and assigns tailored correction specifications to each category, optimizing centering accuracy for each substrate type while maintaining manageable system complexity

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the parameter of correction specification from a fixed single value to a variable that depends on substrate specific resistance. By establishing multiple correction specifications corresponding to different resistance ranges, the system adapts the correction amount to match substrate properties, thereby improving centering precision without excessive complexity

Inventive Principle:
Principle #35Parameter changes

2Productivity

If the substrate wafer is not concentrically positioned on the susceptor, then the deposition process can proceed, but the uniformity of epitaxial layer thickness deteriorates

Engineering Contradiction:
Improvedeposition process efficiencyVSAvoidepitaxial layer thickness uniformity
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by performing positional correction of substrate wafers before the deposition process begins. The robot adjusts the wafer position based on pre-calculated correction specifications that account for substrate-specific resistance, ensuring proper centering is established prior to epitaxial layer deposition, thereby preventing thickness non-uniformity while maintaining process efficiency

Inventive Principle:
Principle #10Preliminary action

3Productivity

If the substrate wafer edge contacts the susceptor due to positional deviation, then the deposition continues, but particle formation increases

Engineering Contradiction:
Improvedeposition continuityVSAvoidparticle formation
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent applies preliminary anti-action by proactively correcting substrate positioning errors before deposition begins. By calculating and applying correction specifications based on substrate resistance and historical positional data, the system prevents edge contact with the susceptor from occurring in the first place, thereby eliminating particle formation while maintaining continuous deposition processes

Inventive Principle:
Principle #9Preliminary anti-action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the uniformity of the epitaxial layer thickness and reduces particle formation by ensuring more accurate centering of substrate wafers, improving edge geometry and deposition processes.

Implementation Method 1

the center of the substrate wafer shifts from its intended position due to thermal stresses that are released

Methodology Applied
Scientific EffectThermal stress: Thermal Expansion

Implementation Method 2

an epitaxial layer is deposited from the gas phase in a deposition chamber

Methodology Applied
Scientific EffectVapor deposition: Physical Vapour Deposition

Data Source

PatentEP4075489B1Method for manufacturing semiconductor wafers having an epitaxial layer deposited from the gas phase in a deposition chamber
Publication Date: 2024.02.28 SILTRONIC AG
  • EP4075489B1 patent drawingFigure 1
  • EP4075489B1 patent drawingFigure 2
  • EP4075489B1 patent drawingFigure 3

AI summary

Method for producing semiconductor wafers with an epitaxial layer deposited from the gas phase in a deposition chamber, comprising depositing a substrate wafer onto a susceptor with a circular circumference by a robot, wherein the robot moves the substrate wafer into a deposit position and deposits it onto the susceptor, wherein in the deposit position the center of the substrate wafer is not above the center of the susceptor due to a correction specification;and the deposition of an epitaxial layer on the substrate disk, characterized in that a first number of substrate disks, which have a specific resistance that falls into a first range, are moved by the robot into the deposit position with a first correction specification, and a second number of substrate disks, which have a specific resistance that falls into a second range, are moved by the robot into the deposit position with a second correction specification, wherein the first and second correction specifications differ from each other.