Epitaxial Waveguide Voids for Thermal Isolation

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Solution Overview

Problem

Existing processes for forming wavelength tunable laser diodes struggle to achieve a flat waveguide layer surface while maintaining thermal insulation, leading to increased optical loss and instability in the semiconductor optical device.

Innovation Solution

A process involving the formation of voids beneath the waveguide layer by selectively growing a dummy layer and etching it away using a faster etchant, which allows for the creation of a flat and smooth surface for the waveguide structure, enhancing thermal isolation and reducing optical loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If voids are formed under the waveguide layer to enhance thermal insulation, then thermal isolation is improved, but the waveguide layer surface becomes non-flat leading to increased optical loss

Engineering Contradiction:
Improvethermal isolationVSAvoidwaveguide layer flatness
Core Design Contradiction:
Loss of energyVSManufacturing precision

Solution Approach 1:

The patent divides the structure into three distinct segments: the waveguide layer, the dummy layer, and the support layer. This segmentation allows the dummy layer to be selectively removed to form voids for thermal isolation while the support layer maintains the flatness required for the waveguide layer, resolving the contradiction between thermal isolation and surface flatness.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a dummy layer as an intermediary element between the waveguide layer and the support layer. This dummy layer serves as a sacrificial material that is selectively removed to create voids, enabling thermal isolation without compromising the flatness of the waveguide layer surface, as the support layer underneath maintains the structural integrity and flatness.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If the waveguide layer surface is made flat to reduce optical loss, then optical performance is improved, but thermal insulation capability deteriorates

Engineering Contradiction:
Improvewaveguide layer flatnessVSAvoidthermal isolation
Core Design Contradiction:
Manufacturing precisionVSLoss of energy

Solution Approach 1:

The patent segments the structure into distinct functional layers: the waveguide layer for optical performance, the dummy layer for thermal isolation, and the support layer for mechanical stability. This segmentation allows the support layer to maintain flatness for optical performance while the dummy layer provides thermal isolation through selectively formed voids.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The dummy layer acts as an intermediary that enables thermal isolation without affecting the flatness of the waveguide layer. By selectively removing portions of the dummy layer to form voids, the patent achieves thermal insulation while the overlying waveguide layer maintains its flat surface for optimal optical performance.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Loss of energy

If a dummy layer is grown and then removed to form voids, then thermal isolation is enhanced, but the process complexity increases

Engineering Contradiction:
Improvethermal isolationVSAvoidprocess steps
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent employs selective epitaxial growth where the dummy layer grows only in specific regions where voids are desired, and selective removal where the dummy layer is etched away only in certain areas. This self-service approach allows the process to automatically create the desired void pattern without requiring additional masking or patterning steps, reducing overall process complexity.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent utilizes parameter changes in the epitaxial growth process, specifically controlling growth conditions to achieve selective growth of the dummy layer. By adjusting growth parameters such as temperature, pressure, and precursor flow rates, the dummy layer is grown only in regions where voids are needed, simplifying the overall process by eliminating the need for additional patterning steps.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The process achieves a flat and smooth waveguide surface, improving the stability and reducing optical loss, while allowing for efficient thermal isolation and precise control of the waveguide layer's temperature, enabling effective wavelength tuning.

Implementation Method 1

immersing the semiconductor substrate within an etchant so as to form a void in a region the dummy layer exists, where the etchant shows an etching rate for the dummy layer enough faster than an etching rate for the supplemental layer and the semiconductor substrate

Methodology Applied
Scientific EffectEtching:

Implementation Method 2

Powering the heater, the reflector region may change a temperature thereof

Methodology Applied
Scientific EffectJoule heating: Joule Heating

Implementation Method 3

form voids under the waveguide layer to enhance thermal insulation

Methodology Applied
Scientific EffectThermal insulation: Thermal Insulation

Data Source

PatentUS10756507B2Process of forming epitaxial substrate and semiconductor optical device
Publication Date: 2020.08.25 SUMITOMO ELECTRIC INDUSTRIES LTD
  • US10756507B2 patent drawing
  • US10756507B2 patent drawing
  • US10756507B2 patent drawing

AI summary

A process of forming a semiconductor optical device is disclosed. The semiconductor optical device provides a waveguide structure accompanied with a heater for varying a temperature of the waveguide structure. The process includes steps of: (a) forming a striped mask on a semiconductor substrate; (b) selectively growing a dummy layer on the semiconductor substrate; (c) removing the patterned mask; (d) burying the dummy layer by a supplemental layer; (e) exposing a portion of the dummy layer by etching a portion of the supplemental layer; (f) and removing the dummy layer by immersing the dummy layer within a solution that shows an etching rate for the dummy layer enough faster than an etching rate for the supplemental layer and the substrate so as to leave a void in a region the dummy layer had existed.