EPROM Cell Read Circuit Using Switching Unit and Comparator

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Solution Overview

Problem

Existing EPROM devices face challenges in efficiently programming and reading multi-bit data due to limitations in their transistor structures and control mechanisms, which affect the accuracy and reliability of data storage and retrieval.

Innovation Solution

The proposed EPROM device incorporates a unit cell structure with PMOS transistors, a switching unit, a multiplexer, and a comparator to control electrical coupling and generate switching control signals, enabling selective output of reference voltages and precise comparison of bit line signals for programming and reading operations across a cell array.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If a PMOS transistor is used as the cell transistor with turn-off state as initial state, then the device can store multi-bit data with improved density, but the reading accuracy and reliability deteriorate due to difficulty in sensing the turn-off state

Engineering Contradiction:
Improvedata storage densityVSAvoidreading accuracy
Core Design Contradiction:
Quantity of substanceVSMeasurement precision

Solution Approach 1:

A switching unit is introduced as an intermediary between the bit line and the cell transistor. This switching unit includes a switching transistor that is turned on during read operations to enable current flow, and a control transistor that generates control signals to switch the switching transistor on or off. This intermediary structure allows the read circuit to sense whether the cell transistor is in turn-on or turn-off state by detecting current flow, thereby solving the problem of reading accuracy for multi-bit storage.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent employs dynamic control of the switching transistor through control signals generated by the control transistor. The switching transistor transitions between on and off states based on the control signals, enabling the system to dynamically adapt to different read conditions and accurately sense the state of the cell transistor even when it is initially in a turn-off state, thus improving reading reliability.

Inventive Principle:
Principle #15Dynamics

2Manufacturing precision

If multiple reference voltages are used for multi-bit data storage, then the programming precision is improved, but the device complexity increases due to additional voltage levels and control circuits

Engineering Contradiction:
Improveprogramming precisionVSAvoidcircuit complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The control transistor serves multiple functions: it generates control signals for the switching transistor, selects different reference voltages for comparison, and enables or disables read operations. This multi-functional design allows the system to handle multiple reference voltages and multi-bit data storage without proportionally increasing circuit complexity, as one transistor performs several critical roles in the read and programming operations.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The read circuit incorporates a feedback mechanism where the current flow through the cell transistor is sensed and compared against reference voltages. The control transistor adjusts the switching transistor's state based on this feedback to accurately determine whether the cell transistor is in turn-on or turn-off state, enabling precise multi-bit data reading and programming with multiple reference voltage levels.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10388383B2EPROM device for storing multi-bit data and read circuit of EPROM device
Publication Date: 2019.08.20 SK HYNIX INC
  • US10388383B2 patent drawing
  • US10388383B2 patent drawing
  • US10388383B2 patent drawing

AI summary

An EPROM device may include a unit cell, a switching unit, a multiplexer, and a comparator. The unit cell may be disposed between a bit line, which is coupled to a program voltage supply line, and a ground voltage terminal. The switching unit may be disposed between the bit line and the program voltage supply line, and may control an electrical coupling between the program voltage supply line and the unit cell according to a switching control signal. The multiplexer may selectively output a first reference voltage, a second reference voltage, and a third reference voltage according to an input of binary data. The comparator may compare an output signal of the multiplexer and the bit line, and generate the switching control signal.