DRAM Equalizer Circuit Transistor Control
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Solution Overview
Problem
Conventional DRAM equalizer circuits face challenges in achieving high-speed operation due to the time required for charging from a recycling capacitor, which increases chip area and power consumption during refresh operations.
Innovation Solution
An equalizer circuit that uses transistors to set the voltages of two wirings to a reference voltage with an offset, reducing the voltage difference and eliminating the need for charge and discharge during precharge operations, allowing for a shorter precharge time and lower power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a recycling capacitor is used to charge the high-voltage-side power supply wiring, then power consumption is reduced, but the charging time increases and chip area increases
Solution Approach 1:
The patent extracts the capacitor from the circuit configuration, eliminating the need for charge recycling while maintaining low power consumption. The equalizer circuit directly equalizes voltages using transistors without requiring a recycling capacitor, thus removing the charging time delay and reducing chip area while still achieving power consumption reduction.
Solution Approach 2:
The patent segments the voltage equalization process into two distinct phases: first making the first transistor conductive to reduce voltage difference, then making the second transistor conductive to achieve full equalization. This segmentation allows for optimized timing and eliminates the need for capacitor charging delays.
2Loss of energy
If a recycling capacitor is used, then power consumption during refresh is reduced, but chip area increases
Solution Approach 1:
The patent removes the recycling capacitor from the circuit, eliminating the need for large capacitor structures on the chip. The voltage equalization is achieved through transistor control alone, significantly reducing chip area while maintaining the power consumption benefits.
3Loss of energy
If the equalizer circuit is made nonconductive after equalization, then power consumption is reduced, but the voltage equalization speed decreases
Solution Approach 1:
The patent dynamically controls the conductivity of transistors based on the equalization progress. The first transistor is made conductive initially to quickly reduce voltage difference, then the second transistor is engaged for final equalization. This dynamic control achieves both fast equalization and low power consumption by minimizing transistor conduction time.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables faster precharge operations and longer intervals between refreshes, reducing power consumption while maintaining high-speed performance and minimizing chip area.
Implementation Method 1
the first transistor is made conductive, and then the second transistor is made conductive
Implementation Method 2
An equalizer circuit that uses transistors to set the voltages of two wirings to a reference voltage with an offset, reducing the voltage difference
Data Source
AI summary
In a conventional equalizer circuit, in an equalizing operation for setting voltages of a wiring pair having a predetermined voltage difference therebetween to be the same, it takes a long time to make the voltages of the wirings in a pair converge to a voltage having an offset with respect to a midpoint voltage of the voltages of the wiring pair after the equalizing operation. According to an equalizer circuit of the present invention, provided is an equalizer circuit (50) which sets the voltages of a first wiring (SAP) and a second wiring (SAN) to be substantially the same and which has a first transistor (N1) connected between the first wiring (SAP) and a first power supply circuit (for example, HVDD−Va) and a second transistor (N2) connected between the first wiring SAP and the second wiring (SAN). The equalizer circuit 50 makes the first transistor (N1) conductive, and then makes the second transistor (N2) conductive.