Equalizer Circuit Eye Width Height Detection

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Solution Overview

Problem

Conventional equalizer circuits in memory storage devices do not effectively detect eye width and eye height of output signals, requiring additional detectors that increase circuit layout area, and lack a mechanism to stabilize at places with large signal errors for subsequent eye detection applications.

Innovation Solution

An equalizer circuit with a signal receiving circuit, logic processing circuit, adjustment control circuit, and timing feedback circuit that generates error signals, adjustment signals, and feedback control signals to adjust reference voltage and sensing clock signals, allowing convergence at signal error-prone areas and enabling eye height and eye width detection without additional detectors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If additional eye width detector and eye height detector are disposed to detect eye width and eye height of output signal, then detection capability is improved, but circuit layout area increases

Engineering Contradiction:
Improveeye width and eye height detection capabilityVSAvoidcircuit layout area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The equalizer circuit is designed to perform multiple functions: it not only equalizes the input signal but also detects eye width and eye height by converging at locations with large signal errors. This multi-functionality eliminates the need for separate dedicated detectors, thereby improving measurement capability without increasing circuit layout area.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the equalization function and the eye parameter detection function into a single equalizer circuit. By combining these functions, the circuit achieves both signal equalization and eye width/height detection capabilities without requiring additional separate detector components, thus avoiding increase in circuit layout area.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If equalizer converges at location with small signal error, then signal quality is improved, but ability to provide useful information for eye detection is reduced

Engineering Contradiction:
Improvesignal qualityVSAvoidinformation for eye detection
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The equalizer circuit dynamically adjusts its convergence behavior based on operational mode. During calibration mode, it converges at locations with large signal errors to maximize eye parameter detection information. During normal operation mode, it converges at locations with small signal errors to maximize signal quality. This dynamic adaptation resolves the contradiction between signal quality and information provision.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The equalizer operates in periodic cycles alternating between calibration mode and normal operation mode. During calibration mode, it intentionally converges at error-prone locations to gather eye detection information. During normal operation, it converges at optimal locations for signal quality. This periodic switching allows the system to achieve both goals at different times.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS11062781B1Equalizer circuit, memory storage device and signal adjustment method
Publication Date: 2021.07.13 PHISON ELECTRONICS
  • US11062781B1 patent drawing
  • US11062781B1 patent drawing
  • US11062781B1 patent drawing

AI summary

An equalizer circuit, a memory storage device and a signal adjustment method are disclosed. The equalizer circuit is configured to receive an input signal, a reference voltage signal and a sensing clock signal and generate an error signal. The equalizer circuit is further configured to generate a first adjustment signal and a second adjustment signal according to the error signal. The equalizer circuit is further configured to update a control code from a first control code to a second control code according to at least one of the first adjustment signal and the second adjustment signal and generate an adjustment control signal according to the control code. The equalizer circuit is further configured to generate a feedback control signal according to the adjustment control signal to restore the control code from the second control code to the first control code.