Parallel Equalizer Gain Adaptation for Signal Noise Reduction
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Solution Overview
Problem
High-speed parallel data transmission in computing systems is hindered by parasitic effects such as signal noise and impedance mismatch, which can be exacerbated by increased operational frequencies and reduced geometric dimensions, leading to inefficiencies in area and power consumption.
Innovation Solution
A data receiving system employing an equalizer circuit that amplifies input signals in different frequency ranges using adjustable gain parameters, with a control circuit that adapts these parameters based on performance metrics and peak amplitudes to optimize signal transmission, thereby mitigating noise and improving transmission efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If wide parallel communication buses are used to transmit data, then data transmission width increases, but parasitic effects such as signal noise and impedance mismatch increase
Solution Approach 1:
The patent segments the wide parallel data bus into multiple narrower parallel buses. This division reduces the number of wires in each bus, thereby decreasing parasitic effects like inductive and capacitive coupling that cause signal noise. The segmentation maintains overall data transmission capacity by using multiple segmented buses simultaneously.
Solution Approach 2:
The patent introduces Serializer and Deserializer (SERDES) circuits as intermediary components. The serializer converts parallel data to serial data for transmission, and the deserializer converts received serial data back to parallel data. This intermediary conversion process eliminates direct parasitic coupling between multiple parallel wires while maintaining high data transmission capability.
2Productivity
If wide parallel communication buses are used to transmit data, then data transmission width increases, but area consumption increases
Solution Approach 1:
The patent segments the wide parallel communication bus into multiple narrower buses. This segmentation reduces the area required for each individual bus by decreasing the number of wires and associated routing resources needed per bus, while the aggregate area is optimized through efficient resource utilization across multiple segmented buses.
3Speed
If operational frequency is increased to improve transmission speed, then data transmission speed increases, but parasitic effects become more pronounced
Solution Approach 1:
The patent uses SERDES circuits as intermediaries to enable high-speed data transmission. The serialization process converts parallel data into serial data streams that can be transmitted at higher frequencies with reduced parasitic effects, since there is only one signal path instead of multiple coupled parallel paths. This intermediary conversion allows the system to achieve high transmission speeds without suffering from pronounced parasitic effects.
4Area of stationary object
If geometric dimensions of buses are reduced to improve integration, then area efficiency increases, but signal noise and propagation delays increase
Solution Approach 1:
The patent employs SERDES circuits as intermediaries that enable efficient use of reduced geometric dimensions. By converting to serial transmission, the system can achieve high-speed data transfer through narrower, more compact bus structures with fewer wires, thereby reducing area while minimizing signal noise and propagation delays that would otherwise result from the reduced dimensions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The system effectively reduces signal noise and improves transmission efficiency by dynamically adjusting gain parameters, enhancing the performance of serial data transfers in computing systems and reducing the need for wide parallel data transfer techniques.
Implementation Method 1
an equalizer circuit receive an input signal via a communication link, and amplify the input signal in a first frequency range and a second frequency range using a first operating parameter and a second operating parameter
Data Source
AI summary
A method and apparatus for adapting, in parallel, two operating parameters associated with an equalizer circuit is disclosed. A control circuit may be configured to initialize a first operating parameter to an initial value, and modify a second operating parameter based upon the initial value of the first parameter. In response to determining a peak amplitude of an output signal of the equalizer circuit is less than a threshold value, the control circuit may be further configured to select a new value for the first operating parameter and adapt, in response to the change in the first operating parameter, the second operating parameter based on a performance metric of the equalizer circuit.