Equalizer Tap Weight Adjustment for Multi-Rate Receiver Timing Stability
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Solution Overview
Problem
In communications systems, the interaction between adaptive equalization and timing recovery loops causes undesirable clock delay corrections, impairing the equalizer's ability to track channel changes, especially in multi-rate receivers that need to support various data rates without significant modifications.
Innovation Solution
A mechanism is introduced where an equalizer operates in a T/M-spaced mode for lower data rates, coupled with a decimator and an ADC, allowing dynamic adaptation of tap weights to compensate for clock delay corrections using multiple Center of Filter (COF) units, which are derived from tap weights and compared to nominal values to adjust tap weights, thereby reducing interference with the timing recovery loop.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If adaptive equalization is employed to mitigate intersymbol interference, then channel distortion is reduced, but clock delay correction interferes with timing recovery
Solution Approach 1:
The patent extracts the harmful clock delay correction effect from the equalization process by introducing a separate timing recovery loop that independently handles timing adjustments. The equalizer focuses solely on channel distortion mitigation while the timing recovery loop compensates for clock delay, separating these two functions to eliminate interference.
Solution Approach 2:
The patent introduces a timing recovery loop as an intermediary mechanism between the equalizer and the data recovery process. This intermediary loop processes timing adjustments separately, acting as a mediator that prevents the equalization-induced clock delay corrections from directly interfering with the timing recovery function.
2Reliability
If equalizer adaptation is frozen or slowed down to prevent interaction with timing recovery, then timing recovery is protected, but equalizer's capability to track channel changes is impaired
Solution Approach 1:
The patent segments the signal processing functions into distinct independent modules: an equalizer module for channel distortion mitigation and a separate timing recovery loop for clock delay correction. This segmentation allows both modules to operate independently at full adaptation speed without interfering with each other, resolving the contradiction between stability and adaptability.
Solution Approach 2:
The patent implements a feedback mechanism in the timing recovery loop that continuously monitors timing errors and adjusts the sampling clock accordingly. This feedback loop isolates the timing recovery function from the equalization process, allowing the equalizer to adapt freely while the feedback mechanism handles timing corrections separately.
3Adaptability or versatility
If receiver is designed to support multiple data rates, then versatility is improved, but device complexity increases
Solution Approach 1:
The patent designs the receiver with universal components that can handle multiple data rates through a single architecture. The equalizer and timing recovery loop are configured to operate across different rates without requiring separate dedicated circuits for each rate, achieving multi-functionality with minimal added complexity.
Solution Approach 2:
The patent employs dynamic configuration capabilities where the receiver can adaptively adjust processing parameters based on the detected data rate. The equalizer tap weights, filtering coefficients, and sampling rates are dynamically modified to match the incoming signal rate, allowing a single receiver structure to support multiple rates through dynamic reconfiguration rather than hardware complexity.
Data Source
AI summary
A receiver including an equalizer disposed upstream of a decimator and capable of effectively preventing undesirable interaction between equalization adaptation and the overall timing recovery loop in cases of various data rates. The equalizer operates in a full operation rate even in the case of a lower-than-full data rate, e.g., half or quarter data rate. For input analog signal having 1/M of the full data rate (M>1), M or more Center of Filter (COF) values are determine. Each COF may be derived from a function of a respective set of tap weights and compared with a corresponding nominal COF to obtain a COF offset. The resultant COF offsets are used as indications of clock phase correction caused by equalization adaptation to adjust a set of selected tap weights. The taps selected for adjustment encompass at least M samples to correctly indicate the COF offset associate with one symbol.