Equalizing Circuit for Semiconductor Memory Devices

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Solution Overview

Problem

Current semiconductor memory devices face issues with high current dissipation and latch-up events due to the generation of high voltage signals, which affect reliability and operation efficiency, especially in low voltage systems.

Innovation Solution

A semiconductor memory device with an equalizing signal generation circuit that includes a clamping circuit to reduce voltage levels and a double pump to boost the power supply voltage, minimizing current dissipation and latch-up events by generating a precharge voltage that is twice the power supply voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If a triple pump is used to generate high voltage VPP, then the voltage level is sufficient for precharge operations, but current dissipation increases significantly

Engineering Contradiction:

Improvevoltage levelVSAvoidcurrent dissipation

Core Design Contradiction:

PowerVSLoss of energy

Solution Approach 1:

The patent changes the voltage generation parameter from triple pump (3x VDD) to double pump (2x VDD), and introduces a voltage booster that selectively generates VPP only when needed. This parameter change reduces current dissipation during normal operations while maintaining sufficient voltage levels when required for precharge operations.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The voltage booster is activated periodically or selectively based on operational requirements rather than continuously generating high voltage. The control circuit enables the voltage booster only when precharge operations are needed, reducing unnecessary current dissipation during non-precharge periods.

Inventive Principle:

Principle #19Periodic action

2Loss of energy

If the equalizing signal voltage level is reduced to decrease current dissipation, then energy efficiency improves, but refresh time increases and operation is delayed

Engineering Contradiction:

Improvecurrent dissipationVSAvoidrefresh time

Core Design Contradiction:

Loss of energyVSLoss of time

Solution Approach 1:

The system dynamically adjusts the voltage level of the equalizing signal based on operational requirements. During precharge operations, the voltage booster generates high voltage VPP to ensure fast operation. During normal operations, the system uses lower voltage to reduce current dissipation. This dynamic voltage adjustment resolves the contradiction between energy efficiency and operation speed.

Inventive Principle:

Principle #15Dynamics

3Loss of time

If a repeater is added to overcome operation delays, then refresh time is reduced, but the circuit complexity and latch-up risk increase

Engineering Contradiction:

Improverefresh timeVSAvoidcircuit structure

Core Design Contradiction:

Loss of timeVSDevice complexity

Solution Approach 1:

The patent combines the voltage boosting function and signal repetition function into a single integrated voltage booster circuit. The voltage booster not only generates high voltage VPP but also acts as a signal repeater, eliminating the need for separate repeater circuits and reducing overall circuit complexity while maintaining fast operation.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The voltage booster circuit performs multiple functions: it boosts voltage from VDD to VPP, acts as a signal repeater for the equalizing signal, and provides controlled activation based on operational needs. This multi-functionality reduces the number of separate components needed while achieving both fast operation and reduced complexity.

Inventive Principle:

Principle #6Universality (Multi-functionality)

4Speed

If high voltage VPP is used for precharge operations, then operation speed is maintained, but latch-up events occur reducing reliability

Engineering Contradiction:

Improveoperation speedVSAvoidlatch-up incidence

Core Design Contradiction:

SpeedVSReliability

Solution Approach 1:

The voltage booster is designed with controlled activation that prevents premature or simultaneous high voltage application to multiple nodes. The circuit incorporates protection mechanisms that activate the voltage booster only when conditions are safe, preventing latch-up events while maintaining fast precharge operation when needed.

Inventive Principle:

Principle #9Preliminary anti-action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution reduces current dissipation and incidence of latch-up events, enhancing the reliability and stability of the semiconductor memory device while maintaining efficient operation.

Implementation Method 1

a double pump to boost the power supply voltage, minimizing current dissipation and latch-up events by generating a precharge voltage that is twice the power supply voltage

Methodology Applied

Scientific EffectVoltage boosting:

Implementation Method 2

an equalizing signal generation circuit that includes a clamping circuit to reduce voltage levels

Methodology Applied

Scientific EffectVoltage clamping:

Data Source

PatentUS7672174B2Equalizing circuit for semiconductor memory device

Publication Date: 2010.03.02 SK HYNIX INC

AI summary

A semiconductor memory device includes an equalizing signal generation circuit comprising a clamping circuit that clamps a voltage level less than the voltage level of a high voltage level by being controlled by the high voltage, and an equalizing signal driver receiving an output signal of the equalizing signal generation circuit as a driving signal.