Equipotential Fill Pattern for High-Voltage Drift Zones
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Solution Overview
Problem
The integration of high voltage transistor devices with low voltage logic devices poses a challenge due to the need for planarization of the elongated drift zone in high voltage transistor devices, which requires fill structures that are not electrically compatible with the expected electric-field distribution.
Innovation Solution
A fill pattern with a variable density that follows the equipotential lines of the electric field distribution is used over the lateral drift zone or termination region of high voltage transistor devices, ensuring compatibility with the electric-field distribution and maintaining the integrity of the surface interface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If fill structures are inserted in the drift zone area to achieve sufficient pattern density for planarization processes, then surface integrity is improved, but the electric-field distribution is altered unfavorably
Solution Approach 1:
The fill structures are designed with locally varying properties - the spacing between fill structures varies across the drift zone to follow equipotential lines. This creates local variations in density and electrical properties that are tailored to each position, allowing the fill to maintain surface integrity while preserving the natural electric-field distribution by having higher fill density in regions where equipotential lines are closer together.
Solution Approach 2:
The fill structures are specifically configured to align with and follow equipotential lines of the electric field. By orienting and spacing fill structures along equipotential contours, the design ensures that the fill does not create new field distortions, as the fill boundaries coincide with regions of equal potential, thereby maintaining the expected electric-field distribution while providing the necessary pattern density for planarization.
2Reliability
If the drift zone is made longer to compensate for altered electric-field distribution, then electric-field distribution is improved, but on-resistance increases
Solution Approach 1:
The harmful effect of fill structures on electric-field distribution is extracted and eliminated by designing the fill pattern to follow equipotential lines. This removes the need for compensatory measures such as extending the drift zone length, thereby avoiding the penalty of increased on-resistance while still achieving the necessary surface integrity for planarization processes.
3Manufacturing precision
If typical fill structures defined for logic areas are used in the drift zone area, then pattern density is improved, but electric-field distribution is altered unfavorably
Solution Approach 1:
Instead of applying a uniform fill pattern design from logic areas to the drift zone, the invention implements locally adapted fill structures whose spacing and orientation vary across the drift zone to follow equipotential lines. This local customization allows the fill to provide sufficient pattern density for CMP while maintaining electrical compatibility with the high-voltage device operation.
Solution Approach 2:
The key parameter changed is the spacing between fill structures, which is varied continuously or in steps across the drift zone to follow the equipotential line distribution. This parameter change transforms the fill pattern from a uniform logic-area design to a drift-zone-optimized design that maintains both manufacturing feasibility and electrical performance.
Data Source
AI summary
According to an embodiment of a semiconductor device, the device includes: a transistor or diode device formed in a semiconductor substrate; an insulating material at least partially covering a lateral drift zone of the transistor or diode device or a termination region; and a fill pattern disposed over the lateral drift zone or termination region, the fill pattern having a variable density that follows equipotential lines of an electric field distribution expected between the fill pattern at a surface of the lateral drift zone or termination region during operation of the semiconductor device. Corresponding methods of producing the semiconductor device are also described.