Erase Fail Detection in 3D Non-Volatile Memory via XOR Verification

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Solution Overview

Problem

In three-dimensional non-volatile memory devices, the increased number of program/erase operations can lead to electron trapping and word-line deterioration, causing threshold voltage issues during erase operations, which may result in incorrect erase verify results due to insufficient resistance elements in memory cells.

Innovation Solution

A method is implemented where an erase voltage is supplied to memory cells, followed by alternating read operations with different verify voltages applied to even and odd word-lines, and an exclusive-or (XOR) operation is performed on the results to accurately determine erase pass/fail status, thereby identifying and addressing the issue of erase fail word-lines.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a single read operation with uniform verify voltage is applied to all word-lines, then the erase verify operation is simple and fast, but the measurement precision of threshold voltage distribution is insufficient, leading to incorrect erase pass/fail determination

Engineering Contradiction:
Improvethreshold voltage distribution measurement precisionVSAvoiderase verify operation complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the word-lines into even and odd groups, applying different verify voltages to each segment. This segmentation allows independent measurement of threshold voltage distributions for different word-line groups, improving measurement precision while maintaining operational simplicity through systematic voltage application patterns.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by assigning different verify voltages to different segments (even vs. odd word-lines). This allows each segment to be measured under optimized local conditions, enabling accurate detection of threshold voltage distributions specific to each word-line group without requiring complex global measurement procedures.

Inventive Principle:
Principle #3Local quality

2Measurement precision

If high voltage is applied to all word-lines during read operation, then the read operation can detect all memory cells, but the measurement precision of individual word-line threshold voltages is compromised due to voltage interaction effects

Engineering Contradiction:
Improveword-line threshold voltage measurement precisionVSAvoidnumber of memory cells measured simultaneously
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent segments the measurement process into two phases: first measuring even word-lines with high voltage while odd word-lines are at low voltage, then measuring odd word-lines with high voltage while even word-lines are at low voltage. This segmentation allows high-voltage measurement of individual word-line groups without voltage interaction effects from other groups, maintaining both measurement precision and comprehensive cell coverage.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs periodic action by alternating between measuring even and odd word-lines in successive read operations. This periodic measurement pattern ensures that each word-line group is measured under high voltage conditions when other groups are at low voltage, eliminating voltage interaction effects while maintaining complete measurement coverage over time.

Inventive Principle:
Principle #19Periodic action

3Reliability

If the threshold voltage of memory cells does not sufficiently decrease during erase operation, then the memory cells retain some charge, but the erase verify operation may still pass incorrectly due to insufficient resistance elements

Engineering Contradiction:
Improveerase operation reliabilityVSAvoiderase verify measurement precision
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent segments the verification process into multiple read operations with different voltage combinations, allowing detection of threshold voltage distributions for different word-line segments. This segmentation enables identification of erase failures in specific segments even when overall erase verify appears to pass, improving both reliability and measurement precision.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses periodic read operations alternating between even and odd word-line measurements to periodically check for erase failures. This periodic verification pattern can detect threshold voltage issues that may be masked in a single verification operation, ensuring reliable detection of erase failures while maintaining measurement precision through repeated measurements.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS20170200506A1Method of detecting erase fail word-line in non-volatile memory device
Publication Date: 2017.07.13 SAMSUNG ELECTRONICS CO LTD
  • US20170200506A1 patent drawing
  • US20170200506A1 patent drawing
  • US20170200506A1 patent drawing

AI summary

A method for operating a non-volatile memory device initially includes supplying an erase voltage to the memory cells. The memory cells are in cell strings in a three-dimensional structure. The method further includes performing a first read operation of the memory cells, performing a second read operation of the memory cells, and then performing a first erase verify operation based on results of the first and second read operations. The first erase verify operation may include performing a first exclusive-or (XOR) operation on the first and second read operation results.