Erase Verification Sampling for Non-Volatile Memory
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Solution Overview
Problem
Current erase verification methods in non-volatile memory devices often fail to ensure complete erasure of memory cells, leading to incomplete erasure of cells with threshold voltages above the reference level, necessitating larger erase margins that reduce the available voltage range for data states in multilevel cell devices.
Innovation Solution
A method that verifies the erased state by sampling a statistical subset of memory cells and comparing the number of failed cells to a threshold value, allowing for repeated erase operations until the desired level of erasure is achieved, thereby ensuring accurate erasure without expanding the voltage range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a single voltage level is used for erase verification, then the verification process is simple and fast, but it cannot detect memory cells with threshold voltages above the reference level, leading to incomplete erasure
Solution Approach 1:
The verification process is segmented into multiple stages with different voltage levels. First, a preliminary verification uses a first voltage level to identify cells that need erasure. Then, a second verification uses a second voltage level (different from the first) to verify complete erasure. This segmentation allows detection of cells with threshold voltages above the reference level while maintaining manageable process complexity.
Solution Approach 2:
The verification process dynamically adjusts voltage levels based on the verification stage. The system transitions from a first voltage level for initial verification to a second voltage level for final verification, allowing the verification process to adapt to different detection requirements and achieve comprehensive erasure verification.
2Reliability
If larger erase margins are used to accommodate variations in erase verification, then verification reliability is improved, but the available voltage range for data states in multilevel cell devices is reduced
Solution Approach 1:
The verification process is divided into two distinct stages with different voltage levels, allowing narrow voltage margins for each stage rather than using a single large margin. The first voltage level handles initial verification while the second voltage level confirms complete erasure, maintaining precision without requiring excessive voltage range.
Solution Approach 2:
The system changes the voltage parameter between verification stages. By using a first voltage level for preliminary verification and a second voltage level for final verification, the system achieves high reliability through multiple checks while minimizing the total voltage range consumed, preserving adaptability for data state representation.
3Productivity
If all memory cells in a series string are verified simultaneously, then the verification process is efficient, but cells with higher threshold voltages may pass verification even when not completely erased
Solution Approach 1:
The verification process segments cells into two groups based on their response to different voltage levels. Cells are first verified at a first voltage level, then re-verified at a second voltage level. This segmentation allows the system to identify and eliminate cells with threshold voltages above the reference level while maintaining efficient batch processing.
Solution Approach 2:
The verification process uses feedback from the first verification stage to guide the second verification stage. Cells that pass the first verification are subjected to a second verification with a different voltage level, providing feedback that ensures complete erasure detection while maintaining overall verification efficiency.
Data Source
AI summary
In one or more embodiments, methods for erasing memory devices, and a memory system are disclosed, one such method comprising determining which cells of a sample are not erased, either directly or indirectly. The number of unerased cells in the sample can be compared to a threshold. An erase operation can be performed on the memory block responsive to the comparison until the number of unerased cells is less than the threshold.