Erasure Code Fault Tolerance Simulator

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Solution Overview

Problem

Existing erasure codes in network systems and storage devices exhibit irregular fault tolerance, making it challenging to determine their reliability and optimize their implementation, which affects data allocation and recovery across storage devices and communication channels.

Innovation Solution

A simulator is developed to evaluate the fault tolerance of erasure codes by generating a minimal erasure list and using a Tanner graph, allowing for the simulation of data loss and determination of mean time to data loss, thereby improving the reliability assessment and data allocation strategies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If erasure codes are used to improve fault tolerance and storage efficiency, then data recovery capability is improved, but computational complexity increases making implementation cumbersome

Engineering Contradiction:
Improvefault toleranceVSAvoidcomputational complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the fault tolerance evaluation into discrete failure scenarios represented by minimal erasure patterns. By breaking down the complex erasure code behavior into individual failure modes (single disk failure, dual disk failure, etc.), the system can evaluate reliability without computing all possible failure combinations, thus reducing computational complexity while maintaining accurate fault tolerance assessment

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary generation of minimal erasure lists and fault tolerance evaluations before actual data storage operations. By pre-computing which failure patterns lead to data loss and which can be recovered, the system avoids real-time computational complexity during data operations, making implementation more practical while preserving fault tolerance capabilities

Inventive Principle:
Principle #10Preliminary action

2Reliability

If traditional fault tolerance methods like mirroring are used, then data recovery capability is improved, but storage space efficiency deteriorates

Engineering Contradiction:
Improvedata recovery capabilityVSAvoidstorage space efficiency
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent extracts only the essential redundancy information needed for fault tolerance through minimal erasure patterns. Instead of creating complete mirror copies of data, the system identifies and stores only the critical parity information required to recover from specific failure scenarios, significantly improving storage space efficiency while maintaining data recovery capability

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the parameter of redundancy representation from full data copies to compact erasure code representations. By transforming the storage approach from mirroring (1:1 redundancy) to erasure coding (k:m redundancy ratios), the system achieves better storage efficiency while preserving fault tolerance through mathematical encoding rather than physical duplication

Inventive Principle:
Principle #35Parameter changes

3Ease of operation

If fault tolerance evaluation excludes device failure characteristics, then evaluation simplicity is improved, but accuracy of fault tolerance assessment deteriorates

Engineering Contradiction:
Improveevaluation simplicityVSAvoidfault tolerance assessment accuracy
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The patent introduces minimal erasure patterns as an intermediary between erasure codes and device failure characteristics. These patterns serve as a bridge that connects code structure with physical failure modes, allowing the system to incorporate device reliability data into the evaluation without directly complex modeling, thus maintaining evaluation simplicity while improving accuracy

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent makes the fault tolerance evaluation dynamic by adapting it to specific device failure characteristics. Rather than using a static evaluation model, the system adjusts the minimal erasure list generation based on actual device reliability parameters, enabling accurate assessment that reflects real-world failure patterns while keeping the evaluation process manageable through modular design

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7925927B2Simulator for determining data loss in a fault tolerant system
Publication Date: 2011.04.12 HEWLETT PACKARD ENTERPRISE DEV LP
  • US7925927B2 patent drawing
  • US7925927B2 patent drawing
  • US7925927B2 patent drawing

AI summary

A fault tolerant system is simulated to determine the occurrence of data loss in the fault tolerant system. A list of erasure patterns corresponding to an erasure code implemented across the devices in the system is provided and a device event is simulated. The list of erasure patterns is updated based on the device event, and the occurrence of data loss is determined based on the updated list.