Erasure Decoder Circuit Using Precomputed Matrices for Low Latency
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Solution Overview
Problem
High-throughput low-latency erasure error correction in integrated circuits is hindered by the complexity of matrix inversion operations in erasure coding, which consumes significant CPU power and increases decoding latency, especially in high-rate erasure codecs with large decoding matrices.
Innovation Solution
The method involves pre-computing and storing multiple decoding matrices for different erasure coding schemes in memory, allowing for rapid retrieval and use of a pre-computed decoding matrix based on the determined bit pattern of survived and erased blocks, facilitating matrix multiplication for error recovery.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If hardware-based accelerators are used to offload erasure coding from CPU, then CPU power consumption is reduced, but matrix inversion complexity increases decoding latency
Solution Approach 1:
The patent pre-computes decoding matrices for all possible erasure patterns before runtime and stores them in memory. During actual decoding, the system only needs to retrieve the pre-computed matrix corresponding to the observed erasure pattern, eliminating the need for complex real-time matrix inversion operations. This preliminary action significantly reduces both computational complexity and decoding latency while maintaining energy efficiency.
2Reliability
If matrix inversion is performed in real-time for erasure decoding, then decoding accuracy is maintained, but computational complexity increases processing time
Solution Approach 1:
All possible decoding matrices are pre-computed and stored in a lookup table during system initialization. At runtime, the decoder identifies the erasure pattern and retrieves the corresponding pre-computed matrix, ensuring decoding accuracy without performing complex real-time matrix inversion. This approach maintains reliability while dramatically reducing computational complexity.
Solution Approach 2:
Instead of computing unique decoding matrices for each erasure pattern, the system pre-computes and stores copies of all possible decoding matrices in memory. This allows rapid retrieval of the appropriate matrix without repeating complex computations, trading memory space for computational simplicity and speed.
3Productivity
If large decoding matrices are used in high-rate erasure codecs, then coding rate is improved, but matrix inversion computation becomes more complex increasing latency
Solution Approach 1:
The system pre-computes large decoding matrices for high-rate erasure codes and stores them in memory during initialization. During operation, the decoder simply retrieves the appropriate pre-computed matrix based on the erasure pattern, enabling high coding rates without the latency penalty of real-time matrix inversion of large matrices.
Data Source
AI summary
An example method of erasure error correction in an IC includes receiving input data from a channel coupled to the IC, determining a bit pattern indicating survived blocks and erased blocks of a plurality of blocks in the input data and determining a number of integers, in a finite set of integers, greater than or less than an integer representing the bit pattern, the finite set of integers representing a finite set of possible values of the bit pattern based on an (m, k) erasure coding scheme. The method further includes generating an address for a memory, which stores a plurality of pre-computed decoding matrices based on the (m, k) erasure coding scheme, from the determined number of integers to obtain a pre-computed decoding matrix associated with the bit pattern. The method further includes recovering the erased blocks through matrix multiplication using the pre-computed decoding matrix and the survived blocks as parametric input.