Error Amplifier Offset Compensation with Trimmed Level Shifting

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Solution Overview

Problem

Conventional switching mode LED drivers face challenges in compensating input voltage offsets in error amplifiers, particularly due to mismatched transconductances and process variations, which affect the accuracy of dimming control and PWM dimming, and require complex matching of multiple transistors and current sources.

Innovation Solution

A compensation circuit comprising a level shifter, two trimming circuits, and a compensation current sinking device, where the level shifter adjusts feedback and reference voltages, and the trimming circuits trim resistances based on a trimming code to compensate input voltage offsets, reducing the need for complex transistor matching and allowing easier design with fewer matched components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the error amplifier is designed with small transconductance to allow large input differential signals, then the error amplifier can handle larger differential signals, but the input voltage offset increases due to mismatch in the active load circuit

Engineering Contradiction:
Improvedifferential signal handling capabilityVSAvoidinput voltage offset
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent introduces an intermediary compensation circuit between the active load circuit and the differential pair circuit. This compensation circuit includes compensation transistors and resistors that actively counteract the voltage offset generated by the active load mismatch, allowing the error amplifier to maintain both small transconductance and low input voltage offset

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the electrical parameters of the compensation circuit components (transistors and resistors) to match and counterbalance the mismatch parameters in the active load circuit. By adjusting the compensation circuit parameters, the overall input voltage offset is reduced while maintaining the desired transconductance level

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If conventional compensation circuits are used to reduce input voltage offset, then the offset compensation is achieved, but the circuit area increases and design complexity increases due to requiring multiple matched transistors and current sources

Engineering Contradiction:
Improveinput voltage offset compensationVSAvoidcircuit area and component matching requirements
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts and isolates the compensation function into a separate, dedicated compensation circuit module. This allows the compensation functionality to be implemented independently with minimal components (only two matched transistors and two resistors), reducing the overall design complexity and area compared to conventional approaches that require multiple matched components distributed throughout the error amplifier

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The compensation circuit is segmented into distinct functional blocks: compensation transistors connected to the active load circuit and compensation resistors connected to the differential pair circuit. This segmentation allows for independent design and matching of only critical components, reducing the overall matching complexity compared to requiring multiple components to be matched simultaneously

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10014848B1Compensation circuit for input voltage offset of error amplifier and error amplifier circuit
Publication Date: 2018.07.03 ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC
  • US10014848B1 patent drawing
  • US10014848B1 patent drawing
  • US10014848B1 patent drawing

AI summary

A compensation circuit for compensating an input voltage offset of an error amplifier has a level shifter, a first trimming circuit, a second trimming circuit, and a compensation current sinking device. The level shifter shifts levels of a feedback voltage and a predetermined reference voltage and outputs a level shifted feedback voltage and a level shifted reference voltage. The first trimming circuit adjusts the level shifted reference voltage by trimming a first resistance thereof according to a trimming code, wherein the trimming code has the ratio relation of the input voltage offset and a resistance to be trimmed. The second trimming circuit adjusts the level shifted feedback voltage by trimming a second resistance thereof according to a trimming code. The compensation current sinking device sinks currents passing through the first and second trimming circuits.