Error Checking System for Data Storage Backplane Integrity
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Solution Overview
Problem
Data storage systems face challenges in error detection and correction for data transmitted across their backplanes, particularly in ensuring data integrity and synchronizing transmission links in case of errors.
Innovation Solution
A method and system for error checking that includes receiving data elements with parity information, performing parity checks, generating CRCs, and corrupting CRCs if invalid, with alarm signals to resynchronize transmission links, and a data transmission system with a master device and slave device for command transmission, response tracking, and link resynchronization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional error detection methods (parity checks only) are used, then device complexity is reduced, but reliability of data transmission deteriorates due to insufficient error detection capability
Solution Approach 1:
The system performs parity checks on incoming data elements before generating CRC codes. When parity errors are detected, the system proactively corrupts the CRC in a predetermined manner and generates alarm signals in advance, preventing undetected error propagation through the system.
Solution Approach 2:
The patent introduces an intermediary error checking system between the data source and destination that combines parity check devices, CRC generators, and alarm signal generators. This intermediary layer enhances reliability by detecting and signaling errors without requiring complex changes to the end systems.
2Reliability
If comprehensive error detection and alarm signaling is implemented, then reliability improves, but loss of time increases due to additional processing steps
Solution Approach 1:
The error checking process is segmented into distinct functional stages: parity check execution, conditional CRC corruption based on parity results, and alarm signal generation. This segmentation allows each operation to be optimized independently and enables parallel processing where possible, minimizing overall processing time.
Solution Approach 2:
The system performs partial error checking by first applying quick parity checks to all data elements, then applying more resource-intensive CRC corruption and alarm signaling only to elements that fail the parity check. This selective approach reduces average processing time while maintaining high reliability.
3Reliability
If CRC corruption and alarm signaling is performed for every parity error, then reliability is maximized, but device complexity increases due to additional components
Solution Approach 1:
The patent merges the parity check device, CRC generator, and alarm signal generator into an integrated error checking system. These functions are combined in a coordinated manner where the parity check output directly controls the CRC corruption logic, which in turn triggers alarm signal generation, reducing the need for separate complex control mechanisms.
Solution Approach 2:
The error checking system is designed with multi-functional components that perform multiple roles. The CRC generator serves both as a normal error detection code generator and as a predetermined corruption mechanism for alarm signaling. The alarm signal generator also functions as part of the overall error detection and transmission link resynchronization process.
Data Source
AI summary
An error checking system includes an input device for receiving a data element including parity information; a parity check device for checking the parity information of the data element to determine whether the data element is valid; a CRC generator coupled to the parity check device for generating a CRC for the data element; and an output device for transmitting the data element with the parity information and CRC to a downstream device over a transmission link. The parity check device is operative to output a corruption signal to the CRC generator if the parity check device determines that the data element is invalid, to instruct the CRC generator to corrupt the CRC generation for that data element.