Error Coordination Across Firmware Domains in Blade Systems
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Solution Overview
Problem
In blade systems, adding blade devices to a partition to increase memory availability leads to higher license costs due to the availability of logical processors, and existing technologies struggle to coordinate error responses between logical processors operating in different system firmware domains.
Innovation Solution
Management firmware executable by service processors is used to acquire and communicate error coordination messages between logical processors in different system firmware domains, enabling error information collection and response coordination without increasing application license costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If blade devices are added to a partition to increase memory availability, then memory availability is improved, but license costs increase due to the availability of logical processors
Solution Approach 1:
The system segments the blade device resources by creating separate SFW domains for different logical processors. The first logical processor operates in a first SFW domain while the second logical processor operates in a second SFW domain, allowing the partition to access memory from both processors without the OS being able to utilize the second logical processor, thus avoiding license cost increases while maintaining memory availability.
Solution Approach 2:
The patent introduces an intermediary mechanism (error coordination message passing through service processors) that enables error coordination between logical processors in different SFW domains. This intermediary allows the first logical processor to detect errors and communicate them to the second logical processor, which then collects error information, solving the coordination problem without requiring direct access between domains.
2Loss of energy
If logical processors operate in different system firmware domains, then license costs are reduced, but error coordination between processors becomes difficult
Solution Approach 1:
The patent introduces an intermediary mechanism (error coordination message passing through service processors) that enables error coordination between logical processors in different SFW domains. This intermediary allows the first logical processor to detect errors and communicate them to the second logical processor, which then collects error information, solving the coordination problem without requiring direct access between domains.
Solution Approach 2:
The system implements a feedback mechanism where the first logical processor detects errors and sends error coordination messages to the second logical processor via service processors. The second logical processor receives these messages and performs error information collection, creating a closed-loop feedback system that maintains reliability across SFW domain boundaries.
3Loss of energy
If the first logical processor is not identified to the OS, then application license costs are reduced, but error detection and coordination becomes more complex
Solution Approach 1:
The patent introduces an intermediary mechanism (error coordination message passing through service processors) that enables error coordination between logical processors in different SFW domains. This intermediary allows the first logical processor to detect errors and communicate them to the second logical processor, which then collects error information, solving the coordination problem without requiring direct access between domains.
Solution Approach 2:
The system implements self-service error handling where each logical processor has its own error detection and collection capabilities. The first logical processor detects errors in its domain, while the second logical processor collects error information when notified, allowing each component to serve itself rather than requiring centralized error management.
Data Source
AI summary
Examples disclosed herein relate to an error coordination message for a blade device having a logical processor in another system firmware (SFW) domain. Examples include a partition of a blade system to run an operating system (OS) utilizing blade devices including respective logical processors operating in different SFW domains. Examples further include an error coordination message made available to one of the blade devices by another of the blade devices.


