Error Correction Decoder Memory Bandwidth Optimization
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Solution Overview
Problem
Conventional error correction techniques in optical disk systems consume excessive bandwidth, making it difficult to perform all necessary error corrections due to bandwidth limitations, especially when the memory device needs to serve multiple roles like video and screen display buffers, leading to insufficient resources for error correction.
Innovation Solution
The system optimizes memory access bandwidth by sorting error correction operations and performing them in a specific order, generating error correction data in sets corresponding to continuous regions of the data block, and correcting errors in a predefined order, thereby minimizing memory access and bandwidth usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional error correction techniques are used, then error correction capability is maintained, but bandwidth consumption of memory device increases excessively
Solution Approach 1:
The patent segments the error correction process into multiple passes, where each pass corrects a subset of errors. The first pass corrects errors in data blocks using initial syndrome calculations, and subsequent passes handle remaining errors. This segmentation reduces the bandwidth required in any single memory access operation compared to correcting all errors in one pass.
Solution Approach 2:
The patent performs preliminary error correction in the first pass by calculating syndromes and correcting identified errors before subsequent processing. This preliminary action reduces the error burden for later passes, allowing more efficient bandwidth utilization in subsequent operations since fewer corrections are needed later.
2Ease of manufacture
If memory device serves multiple roles (video buffer, screen display buffer), then system manufacturing cost is reduced, but bandwidth resources for error correction become insufficient
Solution Approach 1:
The patent enables a single memory device to serve multiple functions: storing video data, acting as a screen display buffer, and providing bandwidth for error correction operations. The multi-pass error correction methodology is designed to work within the constrained bandwidth available when the memory device shares capacity across these multiple roles.
Solution Approach 2:
The patent employs dynamic error correction strategies where the correction process adapts to available bandwidth conditions. The multi-pass approach allows the system to perform error correction incrementally as bandwidth becomes available, rather than requiring dedicated static bandwidth allocation for error correction.
3Quantity of substance
If error correction decoder with large on-chip memory is used, then bandwidth requirement for error correction is satisfied, but system cost increases significantly
Solution Approach 1:
The patent extracts the error correction functionality from requiring large on-chip memory by implementing a multi-pass correction algorithm that operates with smaller memory buffers. Instead of loading all correction data into on-chip memory at once, the system processes corrections in multiple smaller passes, extracting only the necessary correction data for each pass from the external memory device.
Solution Approach 2:
The patent applies partial error correction in each pass, correcting a subset of errors rather than attempting to correct all errors in a single comprehensive pass. This partial action approach allows the system to function effectively with limited on-chip memory resources, as each pass handles only the errors relevant to the current data blocks being processed.
Data Source
AI summary
In a device that utilizes a memory device, the access bandwidth of the memory device is efficiently utilized by determining a set of operations to be performed on information stored in the memory device, and sorting the operations into an order so as to minimize the number of accesses to the memory device to perform the operations. The sorted operations are then performed in that order. An example of such a device is an error correction decoder, such as for use with an optical disk reader or player. The error correction decoder generates error correction data, representing error correction operations, and sorts the error correction data into multiple sets, each set for correcting the errors in a respective row of an ECC block stored in an external buffer. The error correction operations are then performed row by row.