Error Correction Information Storage for Nonvolatile Memory Reliability
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Solution Overview
Problem
Existing error correction methods in data storage devices require significant memory capacity and are inefficient in correcting bit errors, especially in nonvolatile memories like resistive RAM, where endurance errors and data retention errors occur frequently.
Innovation Solution
A device and method that utilize an electronic data memory and a control unit to store bit sequences, check for errors, generate error correction information containing correct bit values, and store this information for later use, allowing for efficient error correction with minimal memory overhead by differentiating between data retention and endurance errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional error correction methods are used in data storage devices, then error correction capability is provided, but memory capacity consumption is high
Solution Approach 1:
The patent segments error correction into two distinct mechanisms: (1) storing error correction information separately from data in a dedicated error correction information storage unit, and (2) applying correction only when errors are detected. This segmentation allows the system to maintain error correction capability while minimizing memory usage, as correction information is stored only for affected data blocks rather than allocating dedicated correction memory for all data.
Solution Approach 2:
The system performs preliminary error detection by checking stored data blocks before attempting correction. The control logic first detects whether errors exist in a data block, and only then retrieves and applies corresponding error correction information. This preliminary detection action avoids unnecessary memory access and processing when no errors are present, improving efficiency while maintaining correction capability.
2Reliability
If error correction information is stored for all bit sequences, then complete error correction is achieved, but memory demand increases
Solution Approach 1:
The patent applies local quality by storing error correction information selectively only for data blocks that have experienced errors, rather than uniformly for all data blocks. The error correction information storage unit maintains associations between specific data block addresses and their correction information, allowing the system to concentrate correction resources where needed while leaving unaffected blocks without correction overhead.
Solution Approach 2:
The system discards error correction information for data blocks that have been successfully corrected or that never contained errors. When a data block is read and found to be error-free, its correction information can be invalidated or removed from active storage. This discarding of unnecessary correction data reduces memory demand while preserving the ability to recover and apply correction information when errors are subsequently detected in the same blocks.
3Reliability
If error correction is performed frequently, then data reliability is improved, but processing time increases
Solution Approach 1:
The system implements periodic error checking rather than continuous correction processing. Data blocks are checked for errors at specific intervals or upon access, and correction is performed only when errors are detected. This periodic approach maintains data reliability by regularly verifying data integrity while minimizing processing time by avoiding constant correction operations on already-correct data.
Solution Approach 2:
The error correction system operates in a self-service manner by automatically detecting errors and applying corrections without requiring external intervention or continuous processing. The control logic autonomously determines when correction is needed, retrieves appropriate correction information, and applies it to the affected data blocks, thereby maintaining reliability while minimizing unnecessary processing time consumption.
Data Source
AI summary
A device comprises an electronic data memory and a control unit configured to store a bit sequence in the electronic data memory as a stored bit sequence. The control unit is configured to check the stored bit sequence for bit errors, to generate error correction information having information about a correct bit value in the stored bit sequence, and to store the error correction information.