Error Detection Method Using Comparator Circuit Feedback Loops
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Solution Overview
Problem
Existing error detection methods in electronic devices are inefficient in detecting latent faults and are not easily adaptable to different types of devices, requiring complex observation and prolonged testing phases.
Innovation Solution
A method and device for comparing test data across multiple identical electronic devices using a comparator circuit with feedback loops and multiplexers, allowing for the detection of errors without direct observation of device operation, and capable of handling various device configurations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If simple observation of device operation is used for error detection, then immediate errors (SPF) can be detected, but latent errors (LFM) cannot be detected
Solution Approach 1:
The patent creates a copy of the original device's test data in a register and compares it with reference data. This copying approach allows detection of latent errors by comparing the copied data state against expected values, rather than relying on observing device operation. The register stores a copy of test data that can be analyzed without affecting device operation.
2Reliability
If multiple test points are monitored simultaneously, then more errors can be detected, but device complexity increases
Solution Approach 1:
The patent merges multiple test point data into a single register for consolidated comparison. Instead of monitoring each test point separately with individual comparison circuits, the invention combines all test data from multiple points into one register that is then compared against reference data, reducing the number of comparison operations needed and simplifying the overall testing architecture.
Solution Approach 2:
The comparison register serves multiple functions: it stores test data from multiple test points, holds reference data for comparison, and enables detection of various error types (STC, ITF, LFM) through a single unified comparison mechanism. This multi-functional approach reduces the need for separate detection systems for different error types.
3Productivity
If traditional error detection methods are used, then immediate errors can be detected, but testing duration is prolonged and adaptability to different device types is limited
Solution Approach 1:
The patent performs preliminary loading of reference data into the comparison register before actual test data arrives. This preliminary action allows the comparison operation to proceed immediately when test data is loaded, eliminating setup delays during the actual testing phase and reducing overall testing duration.
Solution Approach 2:
The patent replaces complex mechanical observation and monitoring systems with an electronic data comparison approach. Instead of physically observing device operation to detect errors, the invention uses electronic registers and digital comparison logic to automatically detect various error types, significantly reducing testing time and improving adaptability to different device types.
Data Source
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AI summary
This description relates to an error detection method comprising comparing at least two identical electronic devices (100A, 100B) comprising at least one chain (103A, 103B) of test data (A1 to AM, B1 to BM), comprising the following steps: (a) the test data in the last position in said chain (103A, 103B) of the two devices (100A, 100B) are compared; (b) the other test data are advanced one position in their data chain; (c) the test data from step (a) are written to the first position in their initial chain (103A, 103B), steps (a), (b), and (c) are repeated until all the test data (A1 to AM, B1 to BM) are returned to their initial position.