Error Detection Using Three-Device Majority Voting

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Solution Overview

Problem

Existing methods for detecting and correcting errors in electronic devices are inadequate, particularly in identifying latent faults and requiring additional memory for data storage, and are not easily applicable to various device types.

Innovation Solution

A method and device that compare at least three identical electronic devices using test data strings with a comparator circuit and feedback loops, allowing for error detection and correction without additional memory, applicable to any device type, and capable of identifying both immediate and latent faults.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If additional memory is used to store test data for comparison, then error detection capability is improved, but device complexity and memory requirements increase

Engineering Contradiction:
Improveerror detection capabilityVSAvoidmemory requirements
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the test data storage function with the functional registers and flip-flops already present in the electronic device. Instead of adding separate memory structures, the test data is stored in the existing functional elements, thereby improving error detection capability without increasing device complexity or memory requirements.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent makes the functional registers and flip-flops serve dual purposes: both their original functional purposes and test data storage. This multi-functionality allows the same hardware elements to be used for both operational purposes and error detection, eliminating the need for additional dedicated memory for testing.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If latent faults are detected through comprehensive testing, then reliability is improved, but testing time and complexity increase

Engineering Contradiction:
Improvelatent fault detectionVSAvoidtesting time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements continuous error detection by comparing test data across multiple devices in real-time during operation. The parallel comparison mechanism continuously monitors for errors including latent faults without requiring separate testing phases, thereby maintaining high reliability while minimizing testing time overhead.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The patent performs preliminary error detection by comparing test data from multiple devices before latent faults can manifest as operational failures. The continuous comparison mechanism detects errors early in their development, allowing for preventive action before they affect system reliability.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If three or more devices are used for comparison, then error detection accuracy is improved, but device quantity and system complexity increase

Engineering Contradiction:
Improveerror detection accuracyVSAvoidsystem complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent uses exactly three devices for comparison, which is the minimum number required to detect errors with high accuracy through majority voting. This partial action approach achieves sufficient error detection precision without the excessive complexity that would result from using more devices, optimizing the balance between accuracy and system complexity.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentEP3798844B1Error detection and correction
Publication Date: 2023.01.11 STMICROELECTRONICS SA
  • EP3798844B1 patent drawingFigure 1
  • EP3798844B1 patent drawingFigure 2
  • EP3798844B1 patent drawingFigure 3

AI summary

This description relates to a method for detecting and correcting errors comprising comparing at least three identical devices (100A, 100B, 100C), each comprising at least one chain (103A, 103B, 103C) of test data, comprising the following steps: (a) the test data in the last position in said chain (103A, 103B, 103C) of said at least three devices (100A, 100B, 100C) are compared; (b) the other test data are advanced one position in their chain (103A, 103B, 103C); and (c) the result of the comparison in step (a) is written in the first position in said chain (103A, 103B, 103C), steps (a), (b), and (c) are repeated until all the test data of said chains (103A, 103B, 103C) are compared.