Numeric Accumulation Error Detection Unit for Floating-Point Precision

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Solution Overview

Problem

Modern processors face challenges in efficiently executing complex instructions, such as floating-point operations, which require more resources and time, impacting overall performance, especially in applications like deep learning and multimedia processing.

Innovation Solution

The implementation of an instruction set architecture with a numeric accumulation error detection unit that flags and notifies applications of precision losses during floating-point operations, allowing for dynamic adjustment of accuracy to balance performance and resource usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If floating-point operations are executed with high precision, then accuracy is improved, but power consumption and hardware requirements increase

Engineering Contradiction:
Improvefloating-point precisionVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent implements a feedback mechanism where the result of a floating-point operation is compared with its approximate value. The comparison unit detects whether the precise result falls within an acceptable error range of the approximate result, and this feedback information is used to dynamically determine whether full precision computation is needed, thereby reducing unnecessary power consumption while maintaining required accuracy.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent introduces dynamic precision adjustment capability. The system can adaptively switch between high-precision and low-precision computation modes based on the specific requirements of different operations and their results. This dynamic approach allows the system to optimize power consumption by using lower precision when sufficient, while maintaining high precision when necessary.

Inventive Principle:
Principle #15Dynamics

2Measurement precision

If floating-point operations are executed with high precision, then accuracy is improved, but hardware complexity increases

Engineering Contradiction:
Improvefloating-point precisionVSAvoidhardware complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the floating-point computation process into distinct stages: approximate computation unit, precise computation unit, and comparison unit. This segmentation allows the system to use simpler approximate computation methods for routine operations while reserving complex precise computation for cases where it is truly needed, thereby reducing overall hardware complexity while maintaining accuracy when required.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary comparison unit that acts as a mediator between approximate and precise computation paths. This intermediary component evaluates whether the approximate result is sufficient or if precise computation is needed, allowing the system to avoid the constant overhead of full-precision hardware while ensuring accuracy when necessary.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If floating-point operations are executed with high precision, then accuracy is improved, but execution speed decreases

Engineering Contradiction:
Improvefloating-point precisionVSAvoidexecution speed
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The patent implements a periodic verification mechanism where approximate computations are performed continuously at high speed, and precise verification is periodically applied only when needed based on the comparison result. This periodic approach to precision checking maintains high execution speed for the majority of operations while ensuring accuracy when required.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent introduces dynamic precision adjustment capability. The system can adaptively switch between high-precision and low-precision computation modes based on the specific requirements of different operations and their results. This dynamic approach allows the system to optimize power consumption by using lower precision when sufficient, while maintaining high precision when necessary.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10146533B2Instruction and logic for detecting numeric accumulation error
Publication Date: 2018.12.04 INTEL CORP
  • US10146533B2 patent drawing
  • US10146533B2 patent drawing
  • US10146533B2 patent drawing

AI summary

A processor includes circuitry to decode at least one instruction and an execution unit. The decoded instruction may compute a floating point result. The execution unit includes circuitry to execute the instruction to determine the floating point result, compute the amount of precision lost in a mantissa of the floating point result, compare the amount of precision lost to a numeric accumulation error precision threshold, determine whether a numeric accumulation error occurred based on the comparison, and write a value to a flag. The amount of precision lost corresponds to a plurality of bits lost in the mantissa of the floating point result. The value to be written to the flag may be based on the determination that the numeric accumulation error occurred. The flag may be for notification that the numeric accumulation error occurred.