Error Injection Controller for Non-Volatile Memory Testing
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Solution Overview
Problem
Existing methods for testing error recovery mechanisms in non-volatile memory devices are inefficient and degrade the endurance of the devices, lacking the ability to perform deterministic testing, which is crucial for ensuring data reliability and system performance.
Innovation Solution
A system and method that includes a controller device coupled with a non-volatile memory storage module, where the bridge device injects errors into storage access commands or operations, allowing for efficient and predictable testing of error recovery mechanisms, including direct and delayed error injection, to ensure reliable operation and integrity of non-volatile memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If random programming and erasing of non-volatile memory cells is performed to test error recovery mechanisms, then error recovery testing can be conducted, but the endurance of the non-volatile memory degrades
Solution Approach 1:
The patent creates a mapping between logical addresses and physical addresses that allows error injection at logical addresses without directly programming or erasing the corresponding physical memory cells. When an error is injected at a logical address, the system translates it to a physical address and simulates the error condition without actually performing wear-inducing program/erase cycles on the non-volatile memory, thus testing error recovery while preserving endurance.
2Reliability
If deterministic testing of error recovery mechanisms is implemented, then testing reliability improves, but system complexity increases
Solution Approach 1:
The patent introduces a mapping table as an intermediary layer between the logical address space and physical address space. This mapping table enables deterministic error injection by allowing the test system to specify exactly which logical addresses should experience errors, and the mapping translates these to physical addresses without requiring complex control logic. The intermediary simplifies the testing system while ensuring deterministic behavior.
Data Source
AI summary
Embodiments of the solid-state storage system provided herein are configured to perform improved mechanisms for testing of error recovery of solid state storage devices. In some embodiments, the system is configured to introduce or inject errors into data storage commands or operations performed in the non-volatile memory. Injected errors include corruption of data stored in the non-volatile memory, deliberate failure to execute storage operations, and errors injected into communication protocols used between various elements of the device. In some embodiments, injected errors can include direct errors that trigger an immediate execution of error recovery mechanisms and delayed errors that trigger execution of error recovery mechanisms at a later time. Error recovery mechanisms can be tested in an efficient, reliable, and deterministic manner to help ensure effective operation of storage devices. The integrity of non-volatile memory can also be tested.