Error Locator Polynomial Adjustment for Faster Decoder Iterations
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Solution Overview
Problem
Decoding data in electronic devices is power and clock cycle intensive due to iterative processes required for error correction, especially when dealing with data errors caused by electrical noise.
Innovation Solution
A decoder adjusts the length of an error locator polynomial based on error parity, allowing for the condensation of decoding operations and reducing the number of clock cycles and power consumption by skipping certain iterations based on parity checks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a decoder uses an iterative decoding process to locate data errors, then error correction capability is improved, but power consumption and clock cycle usage increase
Solution Approach 1:
The patent applies preliminary action by determining the error parity of the received codeword before initiating the iterative decoding process. This preliminary parity check allows the decoder to pre-calculate which iterations can be skipped, thereby reducing power consumption and clock cycle usage while maintaining error correction capability. The parity information is computed in advance to guide the iterative process efficiently.
Solution Approach 2:
The patent implements skipping by allowing the iterative decoding process to bypass certain iterations based on the predetermined error parity. When the current iteration number and error parity indicate that a iteration can be skipped, the decoder jumps directly to the next necessary iteration, reducing the total number of iterations performed. This significantly decreases power consumption and processing time while still achieving accurate error correction.
2Reliability
If a decoder uses an iterative decoding process to locate data errors, then error correction capability is improved, but decoding latency increases
Solution Approach 1:
The patent applies preliminary action by determining the error parity of the received codeword before initiating the iterative decoding process. This preliminary parity check allows the decoder to pre-calculate which iterations can be skipped, thereby reducing decoding latency while maintaining error correction capability. The parity information is computed in advance to guide the iterative process efficiently.
Solution Approach 2:
The patent implements skipping by allowing the iterative decoding process to bypass certain iterations based on the predetermined error parity. When the current iteration number and error parity indicate that a iteration can be skipped, the decoder jumps directly to the next necessary iteration, reducing the total number of iterations performed and thus decreasing decoding latency while still achieving accurate error correction.
3Measurement precision
If a decoder processes all iterations of the decoding algorithm, then decoding accuracy is improved, but the number of clock cycles increases
Solution Approach 1:
The patent applies preliminary action by determining the error parity of the received codeword before initiating the iterative decoding process. This preliminary parity check allows the decoder to pre-calculate which iterations can be skipped, thereby reducing the number of clock cycles required while maintaining decoding accuracy. The parity information is computed in advance to guide the iterative process efficiently.
Solution Approach 2:
The patent implements skipping by allowing the iterative decoding process to bypass certain iterations based on the predetermined error parity. When the current iteration number and error parity indicate that a iteration can be skipped, the decoder jumps directly to the next necessary iteration, reducing the total number of iterations performed. This significantly decreases clock cycle usage while still achieving accurate error correction through the optimized iteration sequence.
Data Source
AI summary
A method of operation of a decoder includes receiving first data at the decoder. The method further includes generating second data at the decoder based on the first data. The second data is generated by adjusting an error locator polynomial based on an error parity of the first data.