Error Re-Logging Circuit for PCIe Bus Interface
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Solution Overview
Problem
Existing bus interface circuits, such as PCIe, lose error data upon system reset, making it difficult to diagnose whether a system freeze is due to a PCIe error or another SoC error, and expensive protocol analyzers are needed to reproduce failure events.
Innovation Solution
A circuit arrangement with a bus interface circuit, a configuration storage circuit, and an error re-logging circuit that polls the configuration storage for error data, stores it in a second storage circuit, and clears the error data from the configuration storage to allow for error analysis even after a system reset.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the system is reset to recover from a frozen state, then the system becomes responsive again, but the error data in the configuration storage circuit is erased
Solution Approach 1:
The error re-logging circuit polls the configuration storage circuit before the reset operation occurs, capturing error data in advance. This preliminary action ensures that error information is preserved in the second storage circuit before the configuration storage is cleared by the reset, allowing post-reset error analysis without requiring the system to remain in a frozen state
Solution Approach 2:
The error re-logging circuit creates a copy of the error data from the configuration storage circuit to a separate second storage circuit. This copying mechanism preserves the error information in a durable storage medium that survives the reset operation, enabling diagnostic analysis after the system recovers from the frozen state
2Measurement precision
If a protocol analyzer is used to monitor PCIe activity, then PCIe link problems can be detected, but the cost increases significantly
Solution Approach 1:
The bus interface circuit performs self-diagnosis by including an integrated error re-logging circuit that automatically polls and captures error data from its own configuration storage circuit. This self-service capability eliminates the need for external protocol analyzers, providing cost-effective error detection while maintaining diagnostic precision through automated error capture and logging functionality
Solution Approach 2:
The error re-logging circuit acts as an intermediary between the configuration storage circuit and the system debugger. It captures error data from the configuration storage and transfers it to durable storage, serving as a cost-effective intermediary that replaces expensive external protocol analyzers while maintaining the ability to detect and analyze PCIe link problems
Data Source
AI summary
A disclosed circuit arrangement includes a bus interface circuit and a configuration storage circuit coupled to the bus interface circuit. The bus interface circuit stores first error data in the configuration storage circuit in response to detection of an error condition. A second storage circuit provides storage of data, and an error re-logging circuit is coupled to the configuration storage circuit and to the second storage circuit. The error re-logging circuit polls the configuration storage circuit for the first error data signaling detection of an error, and in response to the first error data signaling detection of an error, stores the first error data in the second storage circuit, and clears the first error data from the configuration storage circuit to remove the signaling of the detection of the error.