Embedded ESC Diode Structure for High-Temperature Thermal Fatigue
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Solution Overview
Problem
Existing diode designs in electrostatic chucks (ESC) for plasma processing chambers fail prematurely due to excessive thermal stress and fatigue at high temperatures, limiting the operating range and reliability for emerging etch processes.
Innovation Solution
The design incorporates a thin plate with an intermediate coefficient of thermal expansion between the silicon die and the metal strap connector, and uses optimized metal strap connector shapes or wire bonding to reduce thermal stress, with encapsulation in silicone or epoxy to enhance durability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing diode designs are used in electrostatic chucks for plasma processing chambers, then the basic functionality is maintained, but the diodes fail prematurely due to excessive thermal stress and fatigue at high temperatures
Solution Approach 1:
The patent introduces an intermediate material layer with thermal expansion properties matching the silicon die, positioned between the silicon die and the metal strap connector. This intermediary layer acts as a buffer that reduces thermal stress and fatigue during temperature cycling, preventing premature diode failure while enabling extended high-temperature operation in plasma processing chambers
Solution Approach 2:
The patent modifies the thermal expansion parameters of the connector assembly by selecting materials with specific coefficients of thermal expansion. The intermediate layer is chosen to have thermal expansion properties that bridge the mismatch between silicon die and metal strap connector, thereby reducing thermal stress during temperature cycling and extending diode operational lifetime at elevated temperatures
2Reliability
If optimized metal strap connector shapes or wire bonding are used, then thermal stress is reduced, but the manufacturing complexity increases
Solution Approach 1:
The intermediate material layer serves as a mediator that simplifies the overall manufacturing process by providing a standardized interface between the silicon die and metal strap connector. This layer can be applied using conventional semiconductor fabrication techniques, making the enhanced design equally manufacturable as traditional approaches while significantly improving thermal stress resistance
3Reliability
If encapsulation in silicone or epoxy is applied, then durability is enhanced, but the device complexity increases
Solution Approach 1:
The encapsulation material acts as a protective intermediary that seals and protects the diode assembly from environmental degradation and mechanical damage. This additional layer integrates smoothly with the existing diode structure and can be applied using standard encapsulation processes, enhancing durability without significantly increasing device complexity
Solution Approach 2:
The patent employs composite material structures where the diode assembly incorporates multiple materials (silicon die, intermediate layer, metal strap connector, and encapsulation material) each selected for specific properties. This composite approach enhances overall durability and reliability while maintaining manufacturability through established multi-material fabrication techniques
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution significantly extends the operating temperature range and lifetime of the diodes, preventing premature failure and ensuring reliable operation in high-temperature processes without compromising ESC reliability or increasing manufacturing costs.
Implementation Method 1
a second layer of an electrically conducting material having a second coefficient of thermal expansion that is greater than the first coefficient of thermal expansion
Data Source
AI summary
A substrate support for a plasma chamber includes a base plate arranged along a plane, a first layer of an electrically insulating material arranged on the base plate along the plane, a plurality of heating elements arranged in the first layer along the plane, and a plurality of diodes arranged in respective cavities in the first layer. The plurality of diodes are connected in series to the plurality of heating elements, respectively. Each of the plurality of diodes includes a die of a semiconductor material arranged in a respective one of the cavities. The semiconductor material has a first coefficient of thermal expansion. A first side of the die is arranged on the first layer along the plane. A first terminal of the die is connected to a first electrical contact on the first layer.