ESD Blocking Circuits Using Transistor Voltage Dividers
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Solution Overview
Problem
Electrostatic discharge events can cause voltage spikes that damage MOS transistors in semiconductor chip interface circuits, particularly those with ultra-thin gate dielectrics, and existing clamping circuits may be incompatible with micro switches, leading to increased power consumption and malfunction due to leakage currents across different power domains.
Innovation Solution
An electrostatic discharge protection circuit using p-channel and n-channel MOS buffer transistors with blocking transistors configured as voltage dividers to reduce voltage at the gates of MOS transistors during ESD events, compatible with micro switches to minimize power consumption by turning off transistors when not in use.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If clamping circuits are coupled to buffer circuits to prevent voltage exceeding specified values during ESD events, then MOS transistors are protected from ESD damage, but leakage current activates clamping circuit transistors when micro switches are off, causing increased power consumption
Solution Approach 1:
The patent applies preliminary action by introducing blocking transistors that are configured to block leakage current before it can activate the clamping circuit transistors. The blocking transistors are positioned in the signal path and are controlled to be in a blocking state when the micro switch is off, thereby preventing the leakage current from reaching the clamping circuits and causing unnecessary power consumption.
Solution Approach 2:
The patent uses blocking transistors as intermediary elements between the micro switch and the clamping circuits. These blocking transistors act as mediators that control the flow of leakage current, allowing it to be blocked when not needed while maintaining the protective function of the clamping circuits when the micro switch is on.
2Use of energy by moving object
If micro switches are used to temporarily switch off supply voltages to decrease power consumption, then power consumption is reduced, but leakage current causes supply line voltages to float or drift toward opposite potentials, activating clamping circuit transistors
Solution Approach 1:
The blocking transistors are configured in advance to block leakage current paths when the micro switch is in the off state. This preliminary blocking action prevents the supply line voltages from floating or drifting toward opposite potentials, thereby preventing unintended activation of clamping circuit transistors while maintaining low power consumption.
Solution Approach 2:
The patent extracts or removes the harmful leakage current from the system by using blocking transistors to block its path. The blocking transistors effectively take out the leakage current problem by preventing it from flowing through the supply lines and activating clamping circuits, thus eliminating the voltage floating issue.
3Reliability
If clamping circuit transistors are activated by leakage current, then voltage clamping function is provided, but current flows to other parts of the semiconductor chip causing malfunction of buffer circuits
Solution Approach 1:
The blocking transistors are configured to preliminarily block leakage current before it can reach the clamping circuit transistors. This prevents the clamping circuit transistors from being activated by leakage current, thereby preventing current flow to other parts of the semiconductor chip that could cause buffer circuit malfunction.
Solution Approach 2:
The blocking transistors serve as intermediary elements that control the flow of current between the micro switch and the clamping circuits. By acting as mediators, they prevent harmful current flow while allowing the clamping circuits to function properly when needed.
Data Source
AI summary
Techniques and architectures corresponding to electrostatic discharge blocking circuits are described.