ESD Bump Electrode for Semiconductor Protection

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Solution Overview

Problem

Semiconductor devices are susceptible to damage from electrostatic discharge, which can render them defective before their useful life expectancy due to the high static potential discharging through the device when in close proximity to a human body or other charged objects.

Innovation Solution

The implementation of an electrostatic discharge (ESD) bump electrode with a tip on the contact pad of a semiconductor device, separated by a specific distance from a ground plate on the chip carrier substrate, forming a metal-insulator-metal (MIM) capacitor to safely discharge electrostatic energy and protect the active circuitry.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the semiconductor device is placed in close proximity to charged objects or human bodies, then electrostatic discharge can occur through the device, but this causes damage to the active circuitry and renders the device defective

Engineering Contradiction:
Improvedevice reliabilityVSAvoidelectrostatic discharge damage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces an intermediary ESD protection structure positioned between the active circuitry and external charged objects. This structure includes conductive elements that provide a controlled discharge path, allowing static electricity to be safely dissipated without damaging the sensitive active circuits beneath. The intermediary layer acts as a buffer that intercepts and redirects harmful electrostatic energy.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The ESD protection structure is built into the device architecture before the device is put into service. This pre-installed protective layer cushions the active circuitry against future electrostatic attacks by providing a dedicated discharge pathway that activates when static charge approaches dangerous levels, preventing the charge from reaching and damaging the active components.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Reliability

If the breakdown voltage of the semiconductor device is exceeded by static potential, then the IC can be rendered defective, but adding ESD protection structures increases device complexity

Engineering Contradiction:
Improveprotection from electrostatic dischargeVSAvoidESD protection structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the ESD protection function with existing device structures. The protection layers are integrated into the substrate architecture, sharing physical space and manufacturing processes with other device components. This combining approach allows ESD protection to be added without proportionally increasing overall device complexity, as the protective elements coexist with and utilize the same structural framework as the active circuitry.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The ESD protection structure is designed to serve multiple functions simultaneously. Beyond protecting against electrostatic discharge, the conductive layers and ground connections also provide electrical grounding, signal reference planes, and mechanical structural support. This multi-functionality reduces the need for separate dedicated protection components, thereby limiting the increase in device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If a metal-insulator-metal (MIM) capacitor structure is formed with an ESD bump electrode separated from the ground plate by a specific distance, then electrostatic energy can be safely discharged, but this requires precise manufacturing control

Engineering Contradiction:
Improveelectrostatic energy discharge capabilityVSAvoiddistance control between ESD electrode and ground plate
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent specifies optimized parameter ranges for the ESD structure dimensions, particularly the distance between the ESD electrode and ground plate. By establishing specific dimensional parameters and tolerances during design, the structure achieves reliable ESD protection within manufacturable limits. The parameter optimization balances the need for effective electrostatic discharge with the practical constraints of manufacturing precision.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The design incorporates standard manufacturing processes and materials that can be reliably reproduced across production batches. By using conventional fabrication techniques with known precision capabilities, the patent recovers from the challenge of tight tolerances by leveraging established manufacturing expertise and quality control methods, ensuring consistent ESD protection without requiring breakthrough precision manufacturing capabilities.

Inventive Principle:
Principle #34Discarding and recovering

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively reduces the risk of damage from electrostatic discharge by routing the static potential through the ESD bump electrode to the ground plate, ensuring the semiconductor device's active circuitry is protected from high static potentials, thereby extending its operational life.

Implementation Method 1

forming a metal-insulator-metal (MIM) capacitor to safely discharge electrostatic energy

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

routing the static potential through the ESD bump electrode to the ground plate

Methodology Applied
Scientific EffectElectrostatic discharge: Electrostatic Discharge

Data Source

PatentUS7576414B2Electrostatic discharge (ESD) protection structure
Publication Date: 2009.08.18 STATS CHIPPAC LTD
  • US7576414B2 patent drawing
  • US7576414B2 patent drawing
  • US7576414B2 patent drawing

AI summary

A semiconductor device has a substrate with a plurality of active devices formed thereon. A contact pad is formed on the substrate. A solder bump is formed on the contact pad. An electrostatic discharge (ESD) bump electrode is formed on the contact pad. The ESD bump electrode has a tip. The ESD bump electrode is made with gold. A chip carrier substrate has a contact pad metallurgically connected to the solder bump. The chip carrier substrate also has a ground plate. The ground plate is a low impedance ground point. The tip of the ESD bump electrode is separated from the ground plate by a distance according to ESD sensitivity of the active devices. The distance is determined by a ratio of a discharging threshold voltage for ESD sensitivity of the active device to be protected to an atmosphere discharging voltage.