IC ESD Bus Structure Using Bonding Wires Across Discontinuous Edges
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Solution Overview
Problem
Existing integrated circuit electrostatic discharge (ESD) bus structures are inefficient in utilizing circuit area, requiring filler cells that waste space and limiting flexibility in layout design, especially when dealing with irregularly shaped circuits, which increases production costs.
Innovation Solution
The integration of a common ESD bus connected by bonding wires to multiple pad groups, eliminating the need for filler cells by forming a continuous ESD bus across discontinuous boundaries within the chip edges, allowing for full utilization of the circuit area and accommodating irregular shapes without area expansion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If filler cells are placed at empty spaces between I/O pads to connect to ESD bus, then ESD protection is provided to the circuit area, but circuit area is wasted and layout design flexibility is reduced
Solution Approach 1:
The ESD bus is segmented into multiple separate ESD bus segments that can be independently routed to different pad groups. Each pad group has its own ESD bus segment connected via bonding wires, eliminating the need for filler cells to create continuous ESD paths while maintaining ESD protection functionality.
Solution Approach 2:
The ESD bus connection transitions from a planar 2D layout (requiring filler cells within the chip area) to a 3D structure using bonding wires that extend connections outside the chip plane. This allows ESD bus segments to connect pad groups without occupying valuable circuit area on the chip surface.
2Reliability
If filler cells are used to connect circuit area to continuous ESD bus, then ESD protection is achieved, but flexibility for internal circuit layout design is reduced
Solution Approach 1:
The ESD protection network is divided into independent segments, each serving specific pad groups. This segmentation allows the circuit layout to be designed freely within the circuit area without being constrained by the need to maintain continuous ESD bus paths through filler cells.
Solution Approach 2:
Bonding wires serve as intermediaries that connect pad groups to ESD bus segments outside the circuit area. This intermediary connection method eliminates the constraint of requiring filler cells within the circuit area, thereby restoring layout design flexibility.
3Adaptability or versatility
If circuit area is increased to contain circuits with irregular shapes and different areas, then all circuits can be accommodated, but production cost increases
Solution Approach 1:
By moving ESD bus connections to the third dimension using bonding wires, the chip area is freed from the constraint of requiring continuous ESD paths. This allows irregularly shaped circuits to be packed more efficiently within the available circuit area without needing to increase the overall chip size.
Data Source
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AI summary
An integrated circuit ESD bus structure includes a circuit area; a plurality of electrostatic discharge (ESD) buses; a plurality of pad groups adjacent and connected to the plurality of ESD buses; a common ESD bus; and a plurality of bonding wires configured to connect the plurality of pad groups to the common ESD bus.