ESD Protection Circuit Using Capacitive Thyristor Triggering
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Solution Overview
Problem
Conventional electro-static discharge protection circuits for semiconductor integrated circuits face challenges in maintaining a consistent snapback voltage independent of the number of input/output signal bits, leading to inefficiencies in protecting internal circuitry from surge currents.
Innovation Solution
The introduction of a thyristor mode ensuring circuit, which includes a capacitive element connected between the higher and lower potential lines, ensures that the thyristor rectifier circuit is triggered into a thyristor mode by a surge current, maintaining a snapback voltage at or under an acceptable upper limit regardless of the number of input/output signal bits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of input/output signal bits is increased, then the protection coverage is improved, but the chip capacitance increases causing snapback voltage to decrease and triggering reliability to worsen
Solution Approach 1:
A capacitor is introduced as an intermediary element connected between the higher potential line and lower potential line. This capacitor mediates the charge distribution during ESD events, ensuring that the chip capacitance maintains an appropriate value regardless of the number of input/output signal bits, thereby keeping snapback voltage within the reliable triggering range
Solution Approach 2:
The invention changes the electrical parameters of the system by adding a capacitor with specific capacitance value. This parameter change compensates for the variation in chip capacitance caused by different numbers of input/output signal bits, maintaining consistent snapback voltage characteristics across various configuration scenarios
2Reliability
If the number of input/output signal bits is decreased, then the chip capacitance decreases causing snapback voltage to increase, but the protection coverage is reduced
Solution Approach 1:
The capacitor serves as a stabilizing intermediary that prevents snapback voltage from exceeding the acceptable upper limit when the number of input/output signal bits is small. By controlling the charge-discharge dynamics, it ensures reliable thyristor triggering while maintaining adequate protection coverage
Solution Approach 2:
The capacitor provides universal functionality across different configurations of input/output signal bits. A single capacitor value can accommodate varying numbers of signal bits, making the ESD protection circuit universally applicable and reliable regardless of the specific configuration
3Device complexity
If conventional ESD protection circuits are used without a thyristor mode ensuring circuit, then the device complexity is reduced, but the snapback voltage varies with the number of input/output signal bits causing protection inefficiency
Solution Approach 1:
A capacitor is added as a simple intermediary element that significantly improves protection effectiveness without substantially increasing device complexity. This minimal addition ensures snapback voltage remains within the reliable triggering range across all operating conditions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for continuous and effective protection of internal circuitry from electro-static discharge, ensuring the thyristor rectifier circuit operates within a safe voltage range across varying input/output signal bit conditions.
Implementation Method 1
a capacitive element connected between the higher and lower potential lines
Implementation Method 2
Application of electro-static discharge (ESD) to an input/output terminal causes a current to be injected or charged into a chip capacitance
Data Source
AI summary
An electro-static discharge protection circuit includes a thyristor mode ensuring circuit and a thyristor rectifier circuit. The thyristor mode ensuring circuit includes a capacitive element connected between a higher potential line and a lower potential line, and ensures a constant and sufficient capacity independently of the number of input/output signal bits, even when the number of input/output signal bits is a theoretical minimum, i.e. 1, so that a surge current induced by electro-static discharge (ESD) applied to an output pad is injected into the first capacitive element to charge it. Thus, by means of the current caused by the surge current, the thyristor rectifier circuit is triggered into a thyristor mode, which allows the surge current to flow to the lower potential line through the thyristor rectifier circuit, protecting circuitry against the surge current.